Lines Matching defs:gart_info
124 void r600_page_table_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
136 if (gart_info->bus_addr) {
138 max_pages = (gart_info->table_size / sizeof(u64));
149 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
150 gart_info->bus_addr = 0;
158 struct drm_ati_pcigart_info *gart_info = &dev_priv->gart_info;
169 pci_gart = (u64 *)gart_info->addr;
171 max_pages = (gart_info->table_size / sizeof(u64));
183 r600_page_table_cleanup(dev, gart_info);
282 RADEON_WRITE(R600_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, dev_priv->gart_info.bus_addr >> 12);
412 RADEON_WRITE(R700_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, dev_priv->gart_info.bus_addr >> 12);
1850 if (dev_priv->gart_info.mapping.handle) {
1851 r600_page_table_cleanup(dev, &dev_priv->gart_info);
1852 drm_core_ioremapfree(&dev_priv->gart_info.mapping, dev);
1853 dev_priv->gart_info.addr = 0;
1854 dev_priv->gart_info.mapping.handle = 0;
2107 dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
2117 dev_priv->gart_info.bus_addr =
2119 dev_priv->gart_info.mapping.offset =
2121 dev_priv->gart_info.mapping.size =
2122 dev_priv->gart_info.table_size;
2124 drm_core_ioremap_wc(&dev_priv->gart_info.mapping, dev);
2125 if (!dev_priv->gart_info.mapping.handle) {
2131 dev_priv->gart_info.addr =
2132 dev_priv->gart_info.mapping.handle;
2135 dev_priv->gart_info.addr,