Lines Matching refs:VIACR
690 uni_wr_mask(sc, VIACR, CR11, BIT7, BIT7);
696 uni_wr_mask(sc, VIACR, CR11, 0, BIT7);
697 uni_wr_mask(sc, VIACR, CR47, 0, BIT0);
703 uni_wr_mask(sc, VIACR, CR36, 0, BIT5+BIT4);
709 uni_wr_mask(sc, VIACR, CR36, BIT5+BIT4, BIT5+BIT4);
729 uni_wr(sc, VIACR, CR0C, 0x00);
730 uni_wr(sc, VIACR, CR0D, 0x00);
731 uni_wr(sc, VIACR, CR34, 0x00);
732 uni_wr_mask(sc, VIACR, CR48, 0x00, BIT0 + BIT1);
734 uni_wr(sc, VIACR, CR62, 0x00);
735 uni_wr(sc, VIACR, CR63, 0x00);
736 uni_wr(sc, VIACR, CR64, 0x00);
737 uni_wr(sc, VIACR, CRA3, 0x00);
787 uni_wr(sc, VIACR, CR09, 0x00);
788 uni_wr_mask(sc, VIACR, CR11, 0x00, BIT4+BIT5+BIT6);
789 uni_wr_mask(sc, VIACR, CR17, 0x00, BIT7);
795 uni_wr_mask(sc, VIACR, CR17, 0x80, BIT7);
912 uni_load_reg(sc, val, regnum, reg, VIACR);
945 if (type == VIACR)
946 uni_wr_mask(sc, VIACR, cridx, data, regmask);
957 uni_wr_mask(sc, VIACR, CR03, 0x80, BIT7);
958 uni_wr(sc, VIACR, CR18, 0xff);
959 uni_wr_mask(sc, VIACR, CR07, 0x10, BIT4);
960 uni_wr_mask(sc, VIACR, CR09, 0x40, BIT6);
961 uni_wr_mask(sc, VIACR, CR35, 0x10, BIT4);
962 uni_wr_mask(sc, VIACR, CR33, 0x06, BIT0+BIT1+BIT2);
963 uni_wr(sc, VIACR, CR17, 0xe3);
964 uni_wr(sc, VIACR, CR08, 0x00);
965 uni_wr(sc, VIACR, CR14, 0x00);
980 VIACR);
1122 uni_wr_mask(sc, VIACR, CR17, 0x00, BIT7);
1138 uni_wr_mask(sc, VIACR, CR17, 0x80, BIT7);