Lines Matching defs:regr
411 regr(struct mach64_softc *sc, uint32_t index)
443 reg = regr(sc, CLOCK_CNTL);
466 while ((regr(sc, FIFO_STAT) & 0xffff) > (0x8000 >> v))
474 while ((regr(sc, GUI_STAT) & 1) != 0)
636 sc->memtype = (regr(sc, CONFIG_STAT0) >> 3) & 0x07;
638 sc->memtype = regr(sc, CONFIG_STAT0) & 0x07;
650 reg = regr(sc, CLOCK_CNTL);
671 id = regr(sc, CONFIG_CHIP_ID) & 0xffff;
692 aprint_normal("gen_cntl: %08x\n", regr(sc, CRTC_GEN_CNTL));
877 tmp = regr(sc, MEM_CNTL);
922 crtc.h_total_disp = regr(sc, CRTC_H_TOTAL_DISP);
923 crtc.h_sync_strt_wid = regr(sc, CRTC_H_SYNC_STRT_WID);
924 crtc.v_total_disp = regr(sc, CRTC_V_TOTAL_DISP);
925 crtc.v_sync_strt_wid = regr(sc, CRTC_V_SYNC_STRT_WID);
1044 regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) & ~GUI_ENGINE_ENABLE);
1047 regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) | GUI_ENGINE_ENABLE);
1051 regw(sc, BUS_CNTL, regr(sc, BUS_CNTL) | BUS_HOST_ERR_ACK |
1124 regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN);
1129 regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN);
1134 regw(sc, CRTC_INT_CNTL, regr(sc, CRTC_INT_CNTL) & ~0x20);
1148 regw(sc, CRTC_OFF_PITCH, (regr(sc, CRTC_OFF_PITCH) & 0xfff00000) |
1294 clockreg = regr(sc, CLOCK_CNTL);
1885 reg = regr(sc, CRTC_GEN_CNTL);
1890 reg = regr(sc, CRTC_GEN_CNTL);