Lines Matching refs:bnx_shmem_base
544 sc->bnx_shmem_base = REG_RD_IND(sc, BNX_SHM_HDR_ADDR_0 +
547 sc->bnx_shmem_base = HOST_VIEW_SHMEM_BASE;
549 DBPRINT(sc, BNX_INFO, "bnx_shmem_base = 0x%08X\n", sc->bnx_shmem_base);
662 sc->bnx_shared_hw_cfg = REG_RD_IND(sc, sc->bnx_shmem_base +
664 sc->bnx_port_hw_cfg = REG_RD_IND(sc, sc->bnx_shmem_base +
1593 val = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_SHARED_HW_CFG_CONFIG2);
2057 val = REG_RD_IND(sc, sc->bnx_shmem_base +
2549 REG_WR_IND(sc, sc->bnx_shmem_base + BNX_DRV_MB, msg_data);
2554 val = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_FW_MB);
2569 REG_WR_IND(sc, sc->bnx_shmem_base + BNX_DRV_MB, msg_data);
3221 mac_hi = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_PORT_HW_CFG_MAC_UPPER);
3222 mac_lo = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_PORT_HW_CFG_MAC_LOWER);
3346 REG_WR_IND(sc, sc->bnx_shmem_base + BNX_DRV_RESET_SIGNATURE,
3581 reg = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_DEV_INFO_SIGNATURE);
3598 reg = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_PORT_FEATURE);
3605 sc->bnx_fw_ver = REG_RD_IND(sc, sc->bnx_shmem_base +
5602 REG_WR_IND(sc, sc->bnx_shmem_base + BNX_DRV_PULSE_MB, msg);