dev/cardbus/cardbus.c

125 	sc->sc_iot = cba->cba_iot;	/* CardBus I/O space tag */
126 	sc->sc_memt = cba->cba_memt;	/* CardBus MEM space tag */
127 	sc->sc_dmat = cba->cba_dmat;	/* DMA tag */
157 	pcitag_t tag = ca->ca_tag;
177 			u_int32_t e = (*cf->cardbus_conf_read)(cc, tag, i);
211 		cardbus_conf_write(cc, cf, tag, reg, 0);
229 			exrom = cardbus_conf_read(cc, cf, tag, reg);
230 			cardbus_conf_write(cc, cf, tag, reg, exrom | 1);
232 			command = cardbus_conf_read(cc, cf, tag,
234 			cardbus_conf_write(cc, cf, tag,
256 			exrom = cardbus_conf_read(cc, cf, tag, reg);
257 			cardbus_conf_write(cc, cf, tag, reg, exrom & ~1);
260 			command = cardbus_conf_read(cc, cf, tag,
262 			cardbus_conf_write(cc, cf, tag,
271 		command = cardbus_conf_read(cc, cf, tag,
273 		cardbus_conf_write(cc, cf, tag, PCI_COMMAND_STATUS_REG,
275 		cardbus_conf_write(cc, cf, tag, reg, 0);
423 	pcitag_t tag;
448 	tag = cardbus_make_tag(cc, cf, sc->sc_bus, function);
460 			id = cardbus_conf_read(cc, cf, tag, PCI_ID_REG);
479 	bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG);
495 		tag = cardbus_make_tag(cc, cf, sc->sc_bus, function);
497 		id = cardbus_conf_read(cc, cf, tag, PCI_ID_REG);
498 		class = cardbus_conf_read(cc, cf, tag, PCI_CLASS_REG);
499 		cis_ptr = cardbus_conf_read(cc, cf, tag, CARDBUS_CIS_REG);
513 		cardbus_conf_write(cc, cf, tag, PCI_BAR0, 0);
514 		cardbus_conf_write(cc, cf, tag, PCI_BAR1, 0);
515 		cardbus_conf_write(cc, cf, tag, PCI_BAR2, 0);
516 		cardbus_conf_write(cc, cf, tag, PCI_BAR3, 0);
517 		cardbus_conf_write(cc, cf, tag, PCI_BAR4, 0);
518 		cardbus_conf_write(cc, cf, tag, PCI_BAR5, 0);
519 		cardbus_conf_write(cc, cf, tag, CARDBUS_ROM_REG, 0);
522 		bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG);
523 		icr = cardbus_conf_read(cc, cf, tag, PCI_INTERRUPT_REG);
552 		cardbus_conf_write(cc, cf, tag, PCI_BHLC_REG, bhlc);
553 		bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG);
584 		ca.ca_tag = tag;
814 	pcitag_t tag;
825 	tag = cardbus_make_tag(cc, cf, sc->sc_bus, func);
827 	command = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG);
831 	cardbus_conf_write(cc, cf, tag, PCI_COMMAND_STATUS_REG, command);
834 		Cardbus_conf_write(ct, tag, PCI_BHLC_REG, ct->ct_bhlc);
860  *	cardbus_function_tag_t cf, pcitag_t tag, int capid, int *offset,
867     pcitag_t tag, int capid, int *offset, pcireg_t *value)
872 	reg = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG);
876 	ofs = PCI_CAPLIST_PTR(cardbus_conf_read(cc, cf, tag,
883 		reg = cardbus_conf_read(cc, cf, tag, ofs);
956 cardbus_get_powerstate_int(cardbus_devfunc_t ct, pcitag_t tag,
963 	value = cardbus_conf_read(cc, cf, tag, offset + PCI_PMCSR);
978 cardbus_get_powerstate(cardbus_devfunc_t ct, pcitag_t tag, pcireg_t *state)
985 	if (!cardbus_get_capability(cc, cf, tag, PCI_CAP_PWRMGMT, &offset, &value))
988 	return cardbus_get_powerstate_int(ct, tag, state, offset);
992 cardbus_set_powerstate_int(cardbus_devfunc_t ct, pcitag_t tag,
1003 	value = cardbus_conf_read(cc, cf, tag, offset + PCI_PMCSR);
1038 	cardbus_conf_write(cc, cf, tag, offset + PCI_PMCSR, value);
1048 cardbus_set_powerstate(cardbus_devfunc_t ct, pcitag_t tag, pcireg_t state)
1055 	if (!cardbus_get_capability(cc, cf, tag, PCI_CAP_PWRMGMT, &offset,
1059 	return cardbus_set_powerstate_int(ct, tag, state, offset, value);
1123     pcitag_t tag, struct cardbus_conf_state *pcs)
1128 		pcs->reg[off] = cardbus_conf_read(cc, cf, tag, (off * 4));
1133     pcitag_t tag, struct cardbus_conf_state *pcs)
1139 		val = cardbus_conf_read(cc, cf, tag, (off * 4));
1141 			cardbus_conf_write(cc, cf,tag, (off * 4), pcs->reg[off]);