Lines Matching refs:op1

62 op1:	.equ		5		/* multiplicand */
74 stws,ma op1,4(%sp) ; save registers on stack
84 ldws 0(%arg0),op1 ; get multiplicand
87 xor op2,op1,sign ; sign(0) = sign of product
88 mpy1: comb,< op1,gr0,mpya ; br. if multiplicand < 0
90 addib,= 0,op1,fini0 ; op1 = 0, product = 0
116 ; ---- bits = 0001 ---- add op1, then shift 4 bits
118 addb,tr op1,pu,sh4n+4 ; add op1 to product, to shift
121 ; ---- bits = 0010 ---- add op1, add op1, then shift 4 bits
123 addb,tr op1,pu,sh4n ; add 2*op1, to shift
124 addb,uv op1,pu,sh4c ; product right 4 bits
126 ; ---- bits = 0011 ---- add op1, add 2*op1, shift 4 bits
128 addb,tr op1,pu,sh4n-4 ; add op1 & 2*op1, shift
129 sh1add,nsv op1,pu,pu ; product right 4 bits
131 ; ---- bits = 0100 ---- shift 2, add op1, shift 2
136 ; ---- bits = 0101 ---- add op1, shift 2, add op1, and shift 2 again
138 addb,tr op1,pu,sh2us ; add op1 to product
141 ; ---- bits = 0110 ---- add op1, add op1, shift 2, add op1, and shift 2 again
143 addb,tr op1,pu,sh2c ; add 2*op1, to shift 2 bits
144 addb,nuv op1,pu,sh2us ; br. if not overflow
146 ; ---- bits = 0111 ---- subtract op1, shift 3, add op1, and shift 1
149 sub pu,op1,pu ; subtract op1, br. to sh3s
152 ; ---- bits = 1000 ---- shift 3, add op1, shift 1
157 ; ---- bits = 1001 ---- add op1, shift 3, add op1, shift 1
159 addb,tr op1,pu,sh3us ; add op1, to shift 3, add op1,
162 ; ---- bits = 1010 ---- add op1, add op1, shift 3, add op1, shift 1
164 addb,tr op1,pu,sh3c ; add 2*op1, to shift 3 bits
165 addb,nuv op1,pu,sh3us ; br. if no overflow
167 ; ---- bits = 1011 ---- add -op1, shift 2, add -op1, shift 2, inc. next index
169 addib,tr 1,brindex,sh2s ; add 1 to index, subtract op1,
170 sub pu,op1,pu ; shift 2 with minus sign
172 ; ---- bits = 1100 ---- shift 2, subtract op1, shift 2, increment next index
177 ; ---- bits = 1101 ---- add op1, shift 2, add -op1, shift 2
179 addb,tr op1,pu,sh2ns ; add op1, to shift 2
182 ; ---- bits = 1110 ---- shift 1 signed, add -op1, shift 3 signed
187 ; ---- bits = 1111 ---- add -op1, shift 4 signed
189 addib,tr 1,brindex,sh4s ; add 1 to index, subtract op1,
190 sub pu,op1,pu ; to shift 4 signed
212 add,>= op1,gr0,gr0 ; if op1 < 0, invert sign,
215 ; special case for multiplier = -2**31, op1 = signed multiplicand
216 ; or multiplicand = -2**31, op1 = signed multiplier
218 shd op1,0,1,pl ; shift op1 left 31 bits
219 mmax: extrs op1,30,31,pu
223 mpya: add,= op1,op1,gr0 ; op1 = -2**31, special case
225 sub 0,op1,op1 ; op1 = |multiplicand|
228 movb,tr op2,op1,mmax ; use op2 as multiplicand
229 shd op1,0,1,pl ; shift it left 31 bits
233 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
237 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
241 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
246 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
259 sub pu,op1,pu ; subtract op1
266 sub pu,op1,pu ; subtract op1 from product
273 sub pu,op1,pu ; subtract op1 from product
278 fini0: movib,tr,n 0,pl,fini ; product = 0 as op1 = 0
281 addb,tr op1,pu,sh2a ; add op1
286 addb,tr op1,pu,sh2a ; add op1 to product
290 addb,tr op1,pu,sh2a ; add op1 to product
310 ldws,mb -4(%sp),op1 ; restore registers