atari/dev/zs.c

282 	struct zschan *zc;
298 		cs->cs_zc = zc =
303 		(void)zc->zc_csr;
304 		(void)zc->zc_csr;
310 			ZS_WRITE(zc, 9, ZSWR9_HARD_RESET);
312 			ZS_WRITE(zc, 9, 0);
318 		zs_loadchannelregs(zc, zs_init_regs);
583 	struct zschan *zc;
597 			zc = cs0->cs_zc;
600 			    (v = zsrint(cs0, zc)) != 0) {
605 			    (v = zsxint(cs0, zc)) != 0) {
610 			    (v = zssint(cs0, zc)) != 0) {
618 			zc = cs1->cs_zc;
621 			    (v = zsrint(cs1, zc)) != 0) {
626 			    (v = zsxint(cs1, zc)) != 0) {
631 			    (v = zssint(cs1, zc)) != 0) {
646 zsrint(struct zs_chanstate *cs, struct zschan *zc)
654 	c = ZS_READ(zc, 1);
655 	c |= (zc->zc_data << 8);
658 	zc->zc_csr = ZSWR0_RESET_ERRORS;
659 	zc->zc_csr = ZSWR0_CLR_INTR;
665 zsxint(struct zs_chanstate *cs, struct zschan *zc)
670 		zc->zc_csr = ZSWR0_RESET_TXINT;
671 		zc->zc_csr = ZSWR0_CLR_INTR;
675 	zc->zc_data = *cs->cs_tba++;
676 	zc->zc_csr = ZSWR0_CLR_INTR;
681 zssint(struct zs_chanstate *cs, struct zschan *zc)
685 	rr0 = zc->zc_csr;
686 	zc->zc_csr = ZSWR0_RESET_STATUS;
687 	zc->zc_csr = ZSWR0_CLR_INTR;
699 			ZS_WRITE(zc, 3, cs->cs_creg[3]);
704 			ZS_WRITE(zc, 3, cs->cs_creg[3]);
733 	struct zschan *zc;
749 		zc     = cs->cs_zc;
793 					c = zc->zc_csr;
798 					zs_loadchannelregs(zc, cs->cs_creg);
804 						zc->zc_data = *cs->cs_tba++;
1307 zs_loadchannelregs(struct zschan *zc, uint8_t *reg)
1311 	zc->zc_csr = ZSM_RESET_ERR;	/* reset error condition */
1312 	i = zc->zc_data;		/* drain fifo */
1313 	i = zc->zc_data;
1314 	i = zc->zc_data;
1315 	ZS_WRITE(zc,  4, reg[4]);
1316 	ZS_WRITE(zc, 10, reg[10]);
1317 	ZS_WRITE(zc,  3, reg[3] & ~ZSWR3_RX_ENABLE);
1318 	ZS_WRITE(zc,  5, reg[5] & ~ZSWR5_TX_ENABLE);
1319 	ZS_WRITE(zc,  1, reg[1]);
1320 	ZS_WRITE(zc,  9, reg[9]);
1321 	ZS_WRITE(zc, 11, reg[11]);
1322 	ZS_WRITE(zc, 12, reg[12]);
1323 	ZS_WRITE(zc, 13, reg[13]);
1324 	ZS_WRITE(zc, 14, reg[14]);
1325 	ZS_WRITE(zc, 15, reg[15]);
1326 	ZS_WRITE(zc,  3, reg[3]);
1327 	ZS_WRITE(zc,  5, reg[5]);