Lines Matching defs:omapwdt32k_sc
49 struct omapwdt32k_softc *omapwdt32k_sc;
62 while (bus_space_read_4(omapwdt32k_sc->sc_iot, omapwdt32k_sc->sc_ioh,
73 bus_space_write_4(omapwdt32k_sc->sc_iot, omapwdt32k_sc->sc_ioh, WSPR,
76 bus_space_write_4(omapwdt32k_sc->sc_iot, omapwdt32k_sc->sc_ioh, WSPR,
84 bus_space_write_4(omapwdt32k_sc->sc_iot, omapwdt32k_sc->sc_ioh, WSPR,
87 bus_space_write_4(omapwdt32k_sc->sc_iot, omapwdt32k_sc->sc_ioh, WSPR,
94 if (omapwdt32k_sc->sc_armed) {
108 bus_space_write_4(omapwdt32k_sc->sc_iot, omapwdt32k_sc->sc_ioh, WCLR,
115 bus_space_write_4(omapwdt32k_sc->sc_iot, omapwdt32k_sc->sc_ioh, WLDR,
116 omapwdt32k_sc->sc_smw.smw_period ?
117 WATCHDOG_COUNT(omapwdt32k_sc->sc_smw.smw_period)
119 bus_space_write_4(omapwdt32k_sc->sc_iot, omapwdt32k_sc->sc_ioh, WCRR,
120 omapwdt32k_sc->sc_smw.smw_period ?
121 WATCHDOG_COUNT(omapwdt32k_sc->sc_smw.smw_period)
130 if (omapwdt32k_sc->sc_armed)
139 if (period != omapwdt32k_sc->sc_smw.smw_period) {
140 omapwdt32k_sc->sc_smw.smw_period = period;
151 int prev_state = omapwdt32k_sc->sc_armed;
159 if (enable != omapwdt32k_sc->sc_armed) {
168 omapwdt32k_sc->sc_armed = enable;
217 bus_space_write_4(omapwdt32k_sc->sc_iot, omapwdt32k_sc->sc_ioh, WTGR,
218 ~bus_space_read_4(omapwdt32k_sc->sc_iot,
219 omapwdt32k_sc->sc_ioh, WTGR));