config/sparc/sparc.c

2424   rtx pat;
2433   pat = PATTERN (trial);
2440   if (GET_CODE (pat) == SET
2441       && GET_CODE (SET_SRC (pat)) == PLUS)
2443       rtx unspec = XEXP (SET_SRC (pat), 1);
2465   rtx pat = PATTERN (trial);
2466   rtx src = SET_SRC (pat);
2493   else if (return_p && TARGET_V9 && ! epilogue_renumber (&pat, 1)
2536   rtx pat;
2559   pat = PATTERN (trial);
2563   if (GET_CODE (SET_DEST (pat)) != REG
2564       || (REGNO (SET_DEST (pat)) >= 8 && REGNO (SET_DEST (pat)) < 24))
2570   if (REGNO (SET_DEST (pat)) >= 32)
2572 	    && ! epilogue_renumber (&pat, 1)
2585   rtx pat;
2593   pat = PATTERN (trial);
2603       if (reg_mentioned_p (gen_rtx_REG (Pmode, 1), pat))
2611   if (GET_CODE (SET_DEST (pat)) != REG
2612       || (REGNO (SET_DEST (pat)) >= 8 && REGNO (SET_DEST (pat)) < 24)
2613       || REGNO (SET_DEST (pat)) >= 32)
2618   if (reg_mentioned_p (gen_rtx_REG (Pmode, 15), pat))
4067 output_restore (rtx pat)
4071   if (! pat)
4077   gcc_assert (GET_CODE (pat) == SET);
4079   operands[0] = SET_DEST (pat);
4080   pat = SET_SRC (pat);
4082   switch (GET_CODE (pat))
4085 	operands[1] = XEXP (pat, 0);
4086 	operands[2] = XEXP (pat, 1);
4090 	operands[1] = XEXP (pat, 0);
4091 	operands[2] = XEXP (pat, 1);
4095 	operands[1] = XEXP (pat, 0);
4096 	gcc_assert (XEXP (pat, 1) == const1_rtx);
4100 	operands[1] = pat;
4150 	  rtx delay, pat;
4155 	  pat = PATTERN (delay);
4157 	  if (TARGET_V9 && ! epilogue_renumber (&pat, 1))
4159 	      epilogue_renumber (&pat, 0);
4165 	      output_restore (pat);
7196 	  rtx pat = PATTERN(insn);
7199 	  if (GET_CODE (pat) != SET || GET_CODE (dep_pat) != SET)
7205 	  if (rtx_equal_p (SET_DEST (dep_pat), SET_SRC (pat)))
7236   rtx pat = PATTERN(insn);
7256 	  if (GET_CODE (pat) != SET || GET_CODE (dep_pat) != SET)
7259 	  if (rtx_equal_p (SET_DEST (dep_pat), SET_SRC (pat)))
7270 	      if (GET_CODE (pat) != SET || GET_CODE (dep_pat) != SET
7272 		  || GET_CODE (SET_SRC (pat)) != MEM
7274 				    XEXP (SET_SRC (pat), 0)))
7371   register rtx pat = PATTERN (insn);
7373   switch (GET_CODE (SET_SRC (pat)))
7393 	rtx op0 = XEXP (SET_SRC (pat), 0);
7394 	rtx op1 = XEXP (SET_SRC (pat), 1);
7406 	rtx op0 = XEXP (SET_SRC (pat), 0);
7407 	rtx op1 = XEXP (SET_SRC (pat), 1);
7415       return GET_MODE (SET_SRC (pat)) == SImode;
7418       return ! (CONST_DOUBLE_LOW (SET_SRC (pat)) & 0x80000000);
7420       return ! (INTVAL (SET_SRC (pat)) & 0x80000000);
7423       return - (GET_MODE (SET_SRC (pat)) == SImode);
7425       return sparc_check_64 (SET_SRC (pat), insn);
7576 	    rtx pat = PATTERN (insn);
7577 	    if (GET_CODE (pat) != SET)
7579 	    if (rtx_equal_p (x, SET_DEST (pat)))
7581 	    if (y && rtx_equal_p (y, SET_DEST (pat)))
7583 	    if (reg_overlap_mentioned_p (SET_DEST (pat), y))
7907   rtx pat, op[4];
7937       pat = GEN_FCN (icode) (op[0], op[1]);
7940       pat = GEN_FCN (icode) (op[0], op[1], op[2]);
7943       pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]);
7949   if (!pat)
7952   emit_insn (pat);