Lines Matching refs:SImode
693 if ((mode) == SImode
835 *pretend_size = regs < 0 ? 0 : GET_MODE_SIZE (SImode) * regs;
842 rtx reg = gen_rtx_REG (SImode, FIRST_ARG_REGNUM + regno);
844 gen_rtx_REG (SImode, ARG_POINTER_REGNUM),
847 emit_move_insn (gen_rtx_MEM (SImode, slot), reg);
931 gen_rtx_MEM (SImode,
932 gen_rtx_PLUS (SImode,
966 base_reg = gen_rtx_REG (SImode, GPR_R9);
975 (direction, gen_rtx_REG (SImode, GPR_FP),
976 gen_rtx_MEM (SImode,
977 gen_rtx_PLUS (SImode, base_reg, GEN_INT (offset))),
1006 base_reg = gen_rtx_REG (SImode, GPR_R9);
1023 (direction, gen_rtx_REG (SImode, GPR_LINK),
1024 gen_rtx_MEM (SImode,
1025 gen_rtx_PLUS (SImode, base_reg, GEN_INT (offset))),
1037 (direction, gen_rtx_REG (SImode, regno),
1038 gen_rtx_MEM (SImode,
1039 gen_rtx_PLUS (SImode, base_reg, GEN_INT (offset))),
1089 size_rtx = gen_rtx_REG (SImode, GPR_R9);
1108 gen_rtx_MINUS (SImode,
1174 size_rtx = gen_rtx_REG (SImode, GPR_R9);
1203 gen_rtx_REG (SImode, GPR_R9));
1209 gen_rtx_PLUS (SImode,
1325 scratch0 = gen_reg_rtx (SImode);
1326 scratch1 = gen_reg_rtx (SImode);
1327 const_scratch = force_reg (SImode, GEN_INT(MT_MIN_INT));
1364 if (! reg_or_0_operand (op0, SImode))
1365 op0 = copy_to_mode_reg (SImode, op0);
1367 if (! reg_or_0_operand (op1, SImode))
1368 op1 = copy_to_mode_reg (SImode, op1);