gas/config/tc-microblaze.c

800   unsigned int immed, temp;
944 	  immed = 0;
949           immed = exp.X_add_number;
972           inst |= (immed << IMM_LOW) & IMM_MASK;
981               immed = immed + 4;
986               inst |= (immed << IMM_LOW) & IMM_MASK;
991           temp = immed & 0xFFFF8000;
1003               inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
1012 	  inst |= (immed << IMM_LOW) & IMM_MASK;
1047           immed = exp.X_add_number;
1050       if (immed != (immed % 32))
1053           immed = immed % 32;
1057       inst |= (immed << IMM_LOW) & IMM5_MASK;
1123         op_end = parse_reg (op_end + 1, &immed);  /* Get rfslN.  */
1127           immed = 0;
1135       inst |= (immed << IMM_LOW) & RFSL_MASK;
1162           immed = exp.X_add_number;
1165       inst |= (immed << IMM_LOW) & IMM15_MASK;
1177         op_end = parse_reg (op_end + 1, &immed);  /* Get rfslN.  */
1181           immed = 0;
1189       inst |= (immed << IMM_LOW) & RFSL_MASK;
1195         op_end = parse_reg (op_end + 1, &immed);  /* Get rfslN.  */
1199           immed = 0;
1204       inst |= (immed << IMM_LOW) & RFSL_MASK;
1260         immed = opcode->immval_mask | REG_MSR_MASK;
1262         immed = opcode->immval_mask | REG_PC_MASK;
1264         immed = opcode->immval_mask | REG_EAR_MASK;
1266         immed = opcode->immval_mask | REG_ESR_MASK;
1268         immed = opcode->immval_mask | REG_FSR_MASK;
1270         immed = opcode->immval_mask | REG_BTR_MASK;
1272         immed = opcode->immval_mask | REG_EDR_MASK;
1274         immed = opcode->immval_mask | REG_PID_MASK;
1276         immed = opcode->immval_mask | REG_ZPR_MASK;
1278         immed = opcode->immval_mask | REG_TLBX_MASK;
1280         immed = opcode->immval_mask | REG_TLBLO_MASK;
1282         immed = opcode->immval_mask | REG_TLBHI_MASK;
1284 	immed = opcode->immval_mask | REG_PVR_MASK | reg2;
1288       inst |= (immed << IMM_LOW) & IMM_MASK;
1309         immed = opcode->immval_mask | REG_MSR_MASK;
1311         immed = opcode->immval_mask | REG_PC_MASK;
1313         immed = opcode->immval_mask | REG_EAR_MASK;
1315         immed = opcode->immval_mask | REG_ESR_MASK;
1317         immed = opcode->immval_mask | REG_FSR_MASK;
1319         immed = opcode->immval_mask | REG_BTR_MASK;
1321         immed = opcode->immval_mask | REG_EDR_MASK;
1323         immed = opcode->immval_mask | REG_PID_MASK;
1325         immed = opcode->immval_mask | REG_ZPR_MASK;
1327         immed = opcode->immval_mask | REG_TLBX_MASK;
1329         immed = opcode->immval_mask | REG_TLBLO_MASK;
1331         immed = opcode->immval_mask | REG_TLBHI_MASK;
1333         immed = opcode->immval_mask | REG_TLBSX_MASK;
1337       inst |= (immed << IMM_LOW) & IMM_MASK;
1433 	  immed = 0;
1438           immed = exp.X_add_number;
1441       temp = immed & 0xFFFF8000;
1453           inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
1462       inst |= (immed << IMM_LOW) & IMM_MASK;
1500           immed = 0;
1505           immed = exp.X_add_number;
1508       temp = immed & 0xFFFF8000;
1520           inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
1529       inst |= (immed << IMM_LOW) & IMM_MASK;
1573           immed = 0;
1578           immed = exp.X_add_number;
1582       temp = immed & 0xFFFF8000;
1594           inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
1601       inst |= (immed << IMM_LOW) & IMM_MASK;