Lines Matching defs:XCore
1 //===-- XCoreInstrInfo.cpp - XCore Instruction Information ----------------===//
10 // This file contains the XCore implementation of the TargetInstrInfo class.
16 #include "XCore.h"
29 namespace XCore {
31 // XCore Condition Codes
43 : XCoreGenInstrInfo(XCore::ADJCALLSTACKDOWN, XCore::ADJCALLSTACKUP),
59 if (Opcode == XCore::LDWFI)
81 if (Opcode == XCore::STWFI)
99 return BrOpc == XCore::BRFU_u6
100 || BrOpc == XCore::BRFU_lu6
101 || BrOpc == XCore::BRBU_u6
102 || BrOpc == XCore::BRBU_lu6;
106 return BrOpc == XCore::BRFT_ru6
107 || BrOpc == XCore::BRFT_lru6
108 || BrOpc == XCore::BRBT_ru6
109 || BrOpc == XCore::BRBT_lru6;
113 return BrOpc == XCore::BRFF_ru6
114 || BrOpc == XCore::BRFF_lru6
115 || BrOpc == XCore::BRBF_ru6
116 || BrOpc == XCore::BRBF_lru6;
124 return BrOpc == XCore::BR_JT
125 || BrOpc == XCore::BR_JT32;
128 /// GetCondFromBranchOpc - Return the XCore CC that matches
130 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc)
133 return XCore::COND_TRUE;
135 return XCore::COND_FALSE;
137 return XCore::COND_INVALID;
143 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC)
147 case XCore::COND_TRUE : return XCore::BRFT_lru6;
148 case XCore::COND_FALSE : return XCore::BRFF_lru6;
154 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC)
158 case XCore::COND_TRUE : return XCore::COND_FALSE;
159 case XCore::COND_FALSE : return XCore::COND_TRUE;
214 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode());
215 if (BranchCode == XCore::COND_INVALID)
236 XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc);
240 if (BranchCode != XCore::COND_INVALID
287 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(TBB);
290 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm());
299 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm());
302 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(FBB);
338 bool GRDest = XCore::GRRegsRegClass.contains(DestReg);
339 bool GRSrc = XCore::GRRegsRegClass.contains(SrcReg);
342 BuildMI(MBB, I, DL, get(XCore::ADD_2rus), DestReg)
348 if (GRDest && SrcReg == XCore::SP) {
349 BuildMI(MBB, I, DL, get(XCore::LDAWSP_ru6), DestReg).addImm(0);
353 if (DestReg == XCore::SP && GRSrc) {
354 BuildMI(MBB, I, DL, get(XCore::SETSP_1r))
370 BuildMI(MBB, I, DL, get(XCore::STWFI))
384 BuildMI(MBB, I, DL, get(XCore::LDWFI), DestReg)
393 MachineInstrBuilder MIB = BuildMI(MF, DL, get(XCore::DBG_VALUE))
403 "Invalid XCore branch condition!");
404 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm()));