Lines Matching refs:ExtVT
2688 EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits);
2691 if (ExtVT == LoadedVT &&
2692 (!LegalOperations || TLI.isLoadExtLegal(ISD::ZEXTLOAD, ExtVT))) {
2699 ExtVT, LN0->isVolatile(), LN0->isNonTemporal(),
2709 if (!LN0->isVolatile() && LoadedVT.bitsGT(ExtVT) && ExtVT.isRound() &&
2710 (!LegalOperations || TLI.isLoadExtLegal(ISD::ZEXTLOAD, ExtVT))) {
2721 unsigned EVTStoreBytes = ExtVT.getStoreSize();
2735 ExtVT, LN0->isVolatile(), LN0->isNonTemporal(),
3671 EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), LowBits);
3673 ExtVT = EVT::getVectorVT(*DAG.getContext(),
3674 ExtVT, VT.getVectorNumElements());
3676 TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG, ExtVT)))
3678 N0.getOperand(0), DAG.getValueType(ExtVT));
4985 EVT ExtVT = VT;
4991 // Special case: SIGN_EXTEND_INREG is basically truncating to ExtVT then
4995 ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT();
5002 ExtVT = EVT::getIntegerVT(*DAG.getContext(),
5005 if (LegalOperations && !TLI.isLoadExtLegal(ExtType, ExtVT))
5008 unsigned EVTBits = ExtVT.getSizeInBits();
5012 if (!ExtVT.isRound())
5044 ExtVT == VT && TLI.isNarrowingProfitable(N0.getValueType(), VT)) {
5073 unsigned EVTStoreBits = ExtVT.getStoreSizeInBits();
5093 ExtVT, LN0->isVolatile(), LN0->isNonTemporal(),
8152 EVT ExtVT = VT.getVectorElementType();
8153 EVT LVT = ExtVT;
8166 if (!BCVT.isVector() || ExtVT.bitsGT(BCVT.getVectorElementType()))
8171 ExtVT = BCVT.getVectorElementType();
8180 InVec.getOperand(0).getValueType() == ExtVT &&