cctools-845/as/m68k.c

213 dreg:	data reg 0-7
214 reg:	address or data register
229 6.? AINDX apc@(num,reg:sz:scale)	--> *(apc+num+reg*scale)
230 6.? AINDX apc@(reg:sz:scale)		--> same, with num=0
231 6.? APODX apc@(num)@(num2,reg:sz:scale)	--> *(*(apc+num)+num2+reg*scale)
232 6.? APODX apc@(num)@(reg:sz:scale)	--> same, with num2=0
233 6.? AMIND apc@(num)@(num2)		--> *(*(apc+num)+num2) (previous mode without an index reg)
234 6.? APRDX apc@(num,reg:sz:scale)@(num2)	--> *(*(apc+num+reg*scale)+num2)
235 6.? APRDX apc@(reg:sz:scale)@(num2)	--> same, with num=0
256 apc@(num8,reg:sz:scale)		--> *(apc+num8+reg*scale)
278 /* DATA and ADDR have to be contiguous, so that reg-DATA gives 0-7==data reg,
279    8-15==addr reg for operands that take both types */
388 	uint32_t	reg;		/* Base register */
603 			/* This supports both CCR and CC as the ccr reg. */
871 	opP->reg=i;
907 		/* Didn't start with an index reg, maybe its offset or offset,reg */
923 			/* Should be offset,reg */
927 				opP->error="Malformed index reg";
932 		/* We've now got offset)   offset,reg)   or    reg) */
939 		if(opP->reg==FAIL || opP->reg==ZPC) opP->mode=AINDX;	/* Other form of indirect */
941 		if(opP->reg==FAIL) opP->mode=AINDX;	/* Other form of indirect */
984 				opP->error="malformed index reg";
1014 	if(!(i>=DATA+0 && i<=ADDR+7)) {	/* if i is not DATA or ADDR reg */
1085 		printf("mode %d, reg %d, ",thark.mode,thark.reg);
1211 		the_ins.operands[0].reg=COPNUM;		/* COP #1 */
1261  opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1266 				if(opP->mode==MSCR || opP->reg==PC ||
1267  opP->reg==ZPC || opP->mode==REGLST)
1274  opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC ||
1314  opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->reg==PC ||
1315  opP->reg==ZPC || opP->mode==REGLST)
1327  opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1342 				if(opP->mode!=MSCR || opP->reg!=CCR)
1358 				if(opP->mode!=MSCR || opP->reg<(FPREG+0) || opP->reg>(FPREG+7))
1363 				if(opP->mode!=MSCR || opP->reg<COPNUM ||
1364  opP->reg>=COPNUM+7)
1370 				if(opP->mode!=MSCR || opP->reg<USP || opP->reg>SRP)
1372 				if(opP->mode!=MSCR || opP->reg<USP || opP->reg>MSP)
1389 						opP->reg=1<<(opP->reg-DATA);
1393 				} else if(s[1]=='8' && opP->reg&0x0FFffFF)
1395 				else if(s[1]=='3' && opP->reg&0x7000000)
1439 				if(opP->mode!=MSCR || !(opP->reg==FPI || opP->reg==FPS || opP->reg==FPC))
1444 				if(opP->mode!=MSCR || opP->reg!=SR)
1449 				if(opP->mode!=MSCR || opP->reg!=USP)
1467 				if (opP->mode != MSCR || (opP->reg != SFC && opP->reg != DFC))
1474 				if (opP->mode != MSCR || (opP->reg != TC && opP->reg != CAL &&
1475 				    opP->reg != VAL && opP->reg != SCC && opP->reg != AC))
1480 				if (opP->reg != VAL)
1485 				if (opP->mode != MSCR || (opP->reg != DRP && opP->reg != SRP &&
1486 				    opP->reg != CRP))
1492 				    (!(opP->reg >= BAD && opP->reg <= BAD+7) &&
1493 				     !(opP->reg >= BAC && opP->reg <= BAC+7)))
1498 				if (opP->reg != PSR)
1503 				if (opP->reg != PCSR)
1509 				if ((opP->mode != MSCR) || (opP->reg != SRP &&
1510 				     opP->reg != CRP && opP->reg != TC))
1514 				if (opP->mode != MSCR || opP->reg != MMUSR)
1518 				if ((opP->mode != MSCR) || (opP->reg != IC &&
1519 				     opP->reg != DC && opP->reg != BC))
1523 				if ((opP->mode != MSCR) || (opP->reg != TT0 &&
1524 				     opP->reg != TT1))
1656 				tmpreg=opP->reg-DATA; /* 0.dreg */
1659 				tmpreg=0x08+opP->reg-ADDR; /* 1.areg */
1664 				if(opP->reg==PC){
1670 				tmpreg=0x10+opP->reg-ADDR; /* 2.areg */
1673 				tmpreg=0x20+opP->reg-ADDR; /* 4.areg */
1676 				tmpreg=0x18+opP->reg-ADDR; /* 3.areg */
1679 				if(opP->reg==PC)
1682 					tmpreg=0x28+opP->reg-ADDR; /* 5.areg */
1686 					if(opP->reg==PC)
1689 						tmpreg=0x30+opP->reg-ADDR;	/* 6.areg */
1699 					if(opP->reg==PC)
1702 					    tmpreg=0x30+opP->reg-ADDR;
1711 					if(opP->reg==PC &&
1734 				if(opP->reg==PC || opP->reg==ZPC) {
1736 					if(opP->reg==ZPC)
1738 				} else if(opP->reg==FAIL) {
1741 				} else tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1763  opP->reg!=FAIL && opP->reg!=ZPC && (siz1==1 || (issbyte(baseo) &&
1772 					nextword|=0x40;	/* No index reg */
1974 			install_operand(s[1],opP->reg-ADDR);
2117 				install_operand('s',opP->reg-ADDR);
2126 					as_bad("Unknown address reg, using A0");
2140 			install_operand(s[1],opP->reg-DATA);
2144 			install_operand(s[1],opP->reg-FPREG);
2148 			tmpreg=1+opP->reg-COPNUM;
2155 			switch(opP->reg) {
2213 			tmpreg=opP->reg-ADDR;
2224 			tmpreg=opP->reg;
2237 			tmpreg=opP->reg;
2260 				? (int)(0x20+opP->reg-DATA)
2276 			install_operand(s[1],opP->reg-DATA);
2280 			if(opP->reg==FPI) tmpreg=0x1;
2281 			else if(opP->reg==FPS) tmpreg=0x2;
2282 			else if(opP->reg==FPC) tmpreg=0x4;
2300 			switch (opP->reg) {
2316 			switch (opP->reg) {
2332 			switch (opP->reg) {
2342 			switch (opP->reg) {
2358 			switch (opP->reg) {
2374 			switch(opP->reg) {
2397 			if (opP->reg == VAL)
2402 			switch(opP->reg) {
2420 			switch (opP->reg) {
2423 				tmpreg = (4 << 10) | ((opP->reg - BAD) << 2);
2428 				tmpreg = (5 << 10) | ((opP->reg - BAC) << 2);
2437 			if (opP->reg == PSR)
2442 			if (opP->reg == PCSR)
2506 	opP->reg=cur_regs;
4000 		printf("mode %d, reg %d, ",
4001 		       the_ins.operands[n].mode, the_ins.operands[n].reg);