Lines Matching defs:cond
1286 Jump branch8(RelationalCondition cond, Address left, TrustedImm32 right)
1292 return branch32(cond, dataTempRegister, immTempRegister);
1295 void compare8(RelationalCondition cond, Address left, TrustedImm32 right, RegisterID dest)
1301 compare32(cond, dataTempRegister, immTempRegister, dest);
1304 Jump branch8(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
1311 return branch32(cond, dataTempRegister, immTempRegister);
1314 Jump branch32(RelationalCondition cond, RegisterID left, RegisterID right)
1316 if (cond == Equal)
1318 if (cond == NotEqual)
1320 if (cond == Above) {
1324 if (cond == AboveOrEqual) {
1328 if (cond == Below) {
1332 if (cond == BelowOrEqual) {
1336 if (cond == GreaterThan) {
1340 if (cond == GreaterThanOrEqual) {
1344 if (cond == LessThan) {
1348 if (cond == LessThanOrEqual) {
1357 Jump branch32(RelationalCondition cond, RegisterID left, TrustedImm32 right)
1360 return branch32(cond, left, immTempRegister);
1363 Jump branch32(RelationalCondition cond, RegisterID left, Address right)
1366 return branch32(cond, left, dataTempRegister);
1369 Jump branch32(RelationalCondition cond, Address left, RegisterID right)
1372 return branch32(cond, dataTempRegister, right);
1375 Jump branch32(RelationalCondition cond, Address left, TrustedImm32 right)
1379 return branch32(cond, dataTempRegister, immTempRegister);
1382 Jump branch32(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
1388 return branch32(cond, dataTempRegister, immTempRegister);
1391 Jump branch32WithUnalignedHalfWords(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
1398 return branch32(cond, dataTempRegister, immTempRegister);
1401 Jump branch32(RelationalCondition cond, AbsoluteAddress left, RegisterID right)
1404 return branch32(cond, dataTempRegister, right);
1407 Jump branch32(RelationalCondition cond, AbsoluteAddress left, TrustedImm32 right)
1411 return branch32(cond, dataTempRegister, immTempRegister);
1414 Jump branchTest32(ResultCondition cond, RegisterID reg, RegisterID mask)
1416 ASSERT((cond == Zero) || (cond == NonZero));
1418 if (cond == Zero)
1423 Jump branchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
1425 ASSERT((cond == Zero) || (cond == NonZero));
1427 if (cond == Zero)
1432 return branchTest32(cond, reg, immTempRegister);
1435 Jump branchTest32(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
1438 return branchTest32(cond, dataTempRegister, mask);
1441 Jump branchTest32(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
1444 return branchTest32(cond, dataTempRegister, mask);
1447 Jump branchTest8(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
1450 return branchTest32(cond, dataTempRegister, mask);
1453 Jump branchTest8(ResultCondition cond, AbsoluteAddress address, TrustedImm32 mask = TrustedImm32(-1))
1457 return branchTest32(cond, dataTempRegister, mask);
1511 Jump branchAdd32(ResultCondition cond, RegisterID src, RegisterID dest)
1513 ASSERT((cond == Overflow) || (cond == Signed) || (cond == PositiveOrZero) || (cond == Zero) || (cond == NonZero));
1514 if (cond == Overflow) {
1540 if (cond == Signed) {
1546 if (cond == PositiveOrZero) {
1552 if (cond == Zero) {
1556 if (cond == NonZero) {
1564 Jump branchAdd32(ResultCondition cond, RegisterID op1, RegisterID op2, RegisterID dest)
1566 ASSERT((cond == Overflow) || (cond == Signed) || (cond == PositiveOrZero) || (cond == Zero) || (cond == NonZero));
1567 if (cond == Overflow) {
1593 if (cond == Signed) {
1599 if (cond == PositiveOrZero) {
1605 if (cond == Zero) {
1609 if (cond == NonZero) {
1617 Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
1620 return branchAdd32(cond, immTempRegister, dest);
1623 Jump branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest)
1627 return branchAdd32(cond, immTempRegister, dest);
1630 Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest)
1632 ASSERT((cond == Overflow) || (cond == Signed) || (cond == PositiveOrZero) || (cond == Zero) || (cond == NonZero));
1633 if (cond == Overflow) {
1677 if (cond == Signed) {
1682 if (cond == PositiveOrZero) {
1687 if (cond == Zero)
1689 if (cond == NonZero)
1695 Jump branchMul32(ResultCondition cond, RegisterID src1, RegisterID src2, RegisterID dest)
1697 ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
1698 if (cond == Overflow) {
1722 if (cond == Signed) {
1728 if (cond == Zero) {
1732 if (cond == NonZero) {
1740 Jump branchMul32(ResultCondition cond, RegisterID src, RegisterID dest)
1742 ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
1743 if (cond == Overflow) {
1767 if (cond == Signed) {
1773 if (cond == Zero) {
1777 if (cond == NonZero) {
1785 Jump branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
1788 return branchMul32(cond, immTempRegister, src, dest);
1791 Jump branchSub32(ResultCondition cond, RegisterID src, RegisterID dest)
1793 ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
1794 if (cond == Overflow) {
1820 if (cond == Signed) {
1826 if (cond == Zero) {
1830 if (cond == NonZero) {
1838 Jump branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
1841 return branchSub32(cond, immTempRegister, dest);
1844 Jump branchSub32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest)
1847 return branchSub32(cond, src, immTempRegister, dest);
1850 Jump branchSub32(ResultCondition cond, RegisterID op1, RegisterID op2, RegisterID dest)
1852 ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
1853 if (cond == Overflow) {
1879 if (cond == Signed) {
1885 if (cond == Zero) {
1889 if (cond == NonZero) {
1897 Jump branchNeg32(ResultCondition cond, RegisterID srcDest)
1900 return branchMul32(cond, dataTempRegister, srcDest);
1903 Jump branchOr32(ResultCondition cond, RegisterID src, RegisterID dest)
1905 ASSERT((cond == Signed) || (cond == Zero) || (cond == NonZero));
1906 if (cond == Signed) {
1912 if (cond == Zero) {
1916 if (cond == NonZero) {
1974 void compare32(RelationalCondition cond, RegisterID left, RegisterID right, RegisterID dest)
1976 if (cond == Equal) {
1979 } else if (cond == NotEqual) {
1982 } else if (cond == Above)
1984 else if (cond == AboveOrEqual) {
1987 } else if (cond == Below)
1989 else if (cond == BelowOrEqual) {
1992 } else if (cond == GreaterThan)
1994 else if (cond == GreaterThanOrEqual) {
1997 } else if (cond == LessThan)
1999 else if (cond == LessThanOrEqual) {
2005 void compare32(RelationalCondition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
2008 compare32(cond, left, immTempRegister, dest);
2011 void test8(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
2013 ASSERT((cond == Zero) || (cond == NonZero));
2016 if (cond == Zero)
2023 if (cond == Zero)
2030 void test32(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
2032 ASSERT((cond == Zero) || (cond == NonZero));
2035 if (cond == Zero)
2042 if (cond == Zero)
2067 Jump branchPtrWithPatch(RelationalCondition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
2071 Jump temp = branch32(cond, left, immTempRegister);
2076 Jump branchPtrWithPatch(RelationalCondition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
2081 Jump temp = branch32(cond, dataTempRegister, immTempRegister);
2551 Jump branchDouble(DoubleCondition cond, FPRegisterID left, FPRegisterID right)
2553 if (cond == DoubleEqual) {
2557 if (cond == DoubleNotEqual) {
2561 if (cond == DoubleGreaterThan) {
2565 if (cond == DoubleGreaterThanOrEqual) {
2569 if (cond == DoubleLessThan) {
2573 if (cond == DoubleLessThanOrEqual) {
2577 if (cond == DoubleEqualOrUnordered) {
2581 if (cond == DoubleNotEqualOrUnordered) {
2585 if (cond == DoubleGreaterThanOrUnordered) {
2589 if (cond == DoubleGreaterThanOrEqualOrUnordered) {
2593 if (cond == DoubleLessThanOrUnordered) {
2597 if (cond == DoubleLessThanOrEqualOrUnordered) {
2670 static RelationalCondition invert(RelationalCondition cond)
2673 if (cond == Equal)
2675 else if (cond == NotEqual)
2677 else if (cond == Above)
2679 else if (cond == AboveOrEqual)
2681 else if (cond == Below)
2683 else if (cond == BelowOrEqual)
2685 else if (cond == GreaterThan)
2687 else if (cond == GreaterThanOrEqual)
2689 else if (cond == LessThan)
2691 else if (cond == LessThanOrEqual)