Lines Matching refs:AL
124 AL = 0xe0000000 // Unconditional / Always execute.
271 void bitAnd(int rd, int rn, ARMWord op2, Condition cc = AL)
276 void bitAnds(int rd, int rn, ARMWord op2, Condition cc = AL)
281 void eor(int rd, int rn, ARMWord op2, Condition cc = AL)
286 void eors(int rd, int rn, ARMWord op2, Condition cc = AL)
291 void sub(int rd, int rn, ARMWord op2, Condition cc = AL)
296 void subs(int rd, int rn, ARMWord op2, Condition cc = AL)
301 void rsb(int rd, int rn, ARMWord op2, Condition cc = AL)
306 void rsbs(int rd, int rn, ARMWord op2, Condition cc = AL)
311 void add(int rd, int rn, ARMWord op2, Condition cc = AL)
316 void adds(int rd, int rn, ARMWord op2, Condition cc = AL)
321 void adc(int rd, int rn, ARMWord op2, Condition cc = AL)
326 void adcs(int rd, int rn, ARMWord op2, Condition cc = AL)
331 void sbc(int rd, int rn, ARMWord op2, Condition cc = AL)
336 void sbcs(int rd, int rn, ARMWord op2, Condition cc = AL)
341 void rsc(int rd, int rn, ARMWord op2, Condition cc = AL)
346 void rscs(int rd, int rn, ARMWord op2, Condition cc = AL)
351 void tst(int rn, ARMWord op2, Condition cc = AL)
356 void teq(int rn, ARMWord op2, Condition cc = AL)
361 void cmp(int rn, ARMWord op2, Condition cc = AL)
366 void cmn(int rn, ARMWord op2, Condition cc = AL)
371 void orr(int rd, int rn, ARMWord op2, Condition cc = AL)
376 void orrs(int rd, int rn, ARMWord op2, Condition cc = AL)
381 void mov(int rd, ARMWord op2, Condition cc = AL)
387 void movw(int rd, ARMWord op2, Condition cc = AL)
393 void movt(int rd, ARMWord op2, Condition cc = AL)
400 void movs(int rd, ARMWord op2, Condition cc = AL)
405 void bic(int rd, int rn, ARMWord op2, Condition cc = AL)
410 void bics(int rd, int rn, ARMWord op2, Condition cc = AL)
415 void mvn(int rd, ARMWord op2, Condition cc = AL)
420 void mvns(int rd, ARMWord op2, Condition cc = AL)
425 void mul(int rd, int rn, int rm, Condition cc = AL)
430 void muls(int rd, int rn, int rm, Condition cc = AL)
435 void mull(int rdhi, int rdlo, int rn, int rm, Condition cc = AL)
440 void vmov_f64(int dd, int dm, Condition cc = AL)
445 void vadd_f64(int dd, int dn, int dm, Condition cc = AL)
450 void vdiv_f64(int dd, int dn, int dm, Condition cc = AL)
455 void vsub_f64(int dd, int dn, int dm, Condition cc = AL)
460 void vmul_f64(int dd, int dn, int dm, Condition cc = AL)
465 void vcmp_f64(int dd, int dm, Condition cc = AL)
470 void vsqrt_f64(int dd, int dm, Condition cc = AL)
475 void vabs_f64(int dd, int dm, Condition cc = AL)
480 void vneg_f64(int dd, int dm, Condition cc = AL)
485 void ldrImmediate(int rd, ARMWord imm, Condition cc = AL)
490 void ldrUniqueImmediate(int rd, ARMWord imm, Condition cc = AL)
495 void dtrUp(DataTransferTypeA transferType, int rd, int rb, ARMWord op2, Condition cc = AL)
500 void dtrUpRegister(DataTransferTypeA transferType, int rd, int rb, int rm, Condition cc = AL)
505 void dtrDown(DataTransferTypeA transferType, int rd, int rb, ARMWord op2, Condition cc = AL)
510 void dtrDownRegister(DataTransferTypeA transferType, int rd, int rb, int rm, Condition cc = AL)
515 void halfDtrUp(DataTransferTypeB transferType, int rd, int rb, ARMWord op2, Condition cc = AL)
520 void halfDtrUpRegister(DataTransferTypeB transferType, int rd, int rn, int rm, Condition cc = AL)
525 void halfDtrDown(DataTransferTypeB transferType, int rd, int rb, ARMWord op2, Condition cc = AL)
530 void halfDtrDownRegister(DataTransferTypeB transferType, int rd, int rn, int rm, Condition cc = AL)
535 void doubleDtrUp(DataTransferTypeFloat type, int rd, int rb, ARMWord op2, Condition cc = AL)
542 void doubleDtrDown(DataTransferTypeFloat type, int rd, int rb, ARMWord op2, Condition cc = AL)
549 void push(int reg, Condition cc = AL)
555 void pop(int reg, Condition cc = AL)
561 inline void poke(int reg, Condition cc = AL)
566 inline void peek(int reg, Condition cc = AL)
571 void vmov_vfp64(int sm, int rt, int rt2, Condition cc = AL)
577 void vmov_arm64(int rt, int rt2, int sm, Condition cc = AL)
583 void vmov_vfp32(int sn, int rt, Condition cc = AL)
589 void vmov_arm32(int rt, int sn, Condition cc = AL)
595 void vcvt_f64_s32(int dd, int sm, Condition cc = AL)
601 void vcvt_s32_f64(int sd, int dm, Condition cc = AL)
607 void vcvt_u32_f64(int sd, int dm, Condition cc = AL)
613 void vcvt_f64_f32(int dd, int sm, Condition cc = AL)
619 void vcvt_f32_f64(int dd, int sm, Condition cc = AL)
625 void vmrs_apsr(Condition cc = AL)
630 void clz(int rd, int rm, Condition cc = AL)
645 void bx(int rm, Condition cc = AL)
650 AssemblerLabel blx(int rm, Condition cc = AL)
750 AssemblerLabel loadBranchTarget(int rd, Condition cc = AL, int useConstantPool = 0)
758 AssemblerLabel jmp(Condition cc = AL, int useConstantPool = 0)
907 instruction[0] = B | AL | (difference & BranchOffsetMask);
914 instruction[0] = LoadUint32 | AL | RN(ARMRegisters::pc) | RD(ARMRegisters::pc) | 4;
953 instruction[0] = toARMWord(AL) | ((instruction[2] & 0x0fff0fff) + sizeof(ARMWord)) | RD(ARMRegisters::S1);
955 instruction[1] = toARMWord(AL) | CMP | SetConditionalCodes | RN(rn) | RM(ARMRegisters::S1);
1022 return AL | B | (offset & BranchOffsetMask);