Lines Matching defs:imm
54 ARMWord ARMAssembler::getOp2(ARMWord imm)
58 if (imm <= 0xff)
59 return Op2Immediate | imm;
61 if ((imm & 0xff000000) == 0) {
62 imm <<= 8;
66 imm = (imm << 24) | (imm >> 8);
70 if ((imm & 0xff000000) == 0) {
71 imm <<= 8;
75 if ((imm & 0xf0000000) == 0) {
76 imm <<= 4;
80 if ((imm & 0xc0000000) == 0) {
81 imm <<= 2;
85 if ((imm & 0x00ffffff) == 0)
86 return Op2Immediate | (imm >> 24) | (rol << 8);
91 int ARMAssembler::genInt(int reg, ARMWord imm, bool positive)
102 if ((imm & mask) == 0) {
103 imm = (imm << rol) | (imm >> (32 - rol));
111 imm = (imm << 8) | (imm >> 24);
115 if ((imm & mask) == 0) {
116 imm = (imm << rol) | (imm >> (32 - rol));
129 ASSERT((imm & 0xff) == 0);
131 if ((imm & 0xff000000) == 0) {
132 imm1 = Op2Immediate | ((imm >> 16) & 0xff) | (((rol + 4) & 0xf) << 8);
133 imm2 = Op2Immediate | ((imm >> 8) & 0xff) | (((rol + 8) & 0xf) << 8);
134 } else if (imm & 0xc0000000) {
135 imm1 = Op2Immediate | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8);
136 imm <<= 8;
139 if ((imm & 0xff000000) == 0) {
140 imm <<= 8;
144 if ((imm & 0xf0000000) == 0) {
145 imm <<= 4;
149 if ((imm & 0xc0000000) == 0) {
150 imm <<= 2;
154 if ((imm & 0x00ffffff) == 0)
155 imm2 = Op2Immediate | (imm >> 24) | ((rol & 0xf) << 8);
159 if ((imm & 0xf0000000) == 0) {
160 imm <<= 4;
164 if ((imm & 0xc0000000) == 0) {
165 imm <<= 2;
169 imm1 = Op2Immediate | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8);
170 imm <<= 8;
173 if ((imm & 0xf0000000) == 0) {
174 imm <<= 4;
178 if ((imm & 0xc0000000) == 0) {
179 imm <<= 2;
183 if ((imm & 0x00ffffff) == 0)
184 imm2 = Op2Immediate | (imm >> 24) | ((rol & 0xf) << 8);
200 ARMWord ARMAssembler::getImm(ARMWord imm, int tmpReg, bool invert)
205 tmp = getOp2(imm);
209 tmp = getOp2(~imm);
217 return encodeComplexImm(imm, tmpReg);
220 void ARMAssembler::moveImm(ARMWord imm, int dest)
225 tmp = getOp2(imm);
231 tmp = getOp2(~imm);
237 encodeComplexImm(imm, dest);
240 ARMWord ARMAssembler::encodeComplexImm(ARMWord imm, int dest)
243 ARMWord tmp = getImm16Op2(imm);
248 movw(dest, getImm16Op2(imm & 0xffff));
249 movt(dest, getImm16Op2(imm >> 16));
253 if (genInt(dest, imm, true))
255 if (genInt(dest, ~imm, false))
258 ldrImmediate(dest, imm);