Lines Matching refs:r19
483 lwz r19,vmmContextPhys(r27) ; Get vmmFAMarea address
486 stw r19,VMMareaPhys(r10) ; Store VMMareaPhys
548 lwz r19,FPUcpu(r25) ; Get the last CPU we ran on
555 mulli r19,r19,ppeSize ; Find offset to the owner per_proc_entry
558 add r19,r18,r19 ; Point to the owner per_proc_entry
559 lwz r19,ppe_vaddr(r19) ; Point to the owner per_proc
561 swvminvfpu: lwarx r18,r16,r19 ; Get the owner
568 stwcx. r18,r16,r19 ; Try to invalidate it
616 lwz r19,VMXcpu(r25) ; Get the last CPU we ran on
623 mulli r19,r19,ppeSize ; Find offset to the owner per_proc_entry
626 add r19,r18,r19 ; Point to the owner per_proc_entry
627 lwz r19,ppe_vaddr(r19) ; Point to the owner per_proc
629 swvminvvec: lwarx r18,r16,r19 ; Get the owner
636 stwcx. r18,r16,r19 ; Try to invalidate it
773 lwz r19,vmmFlags(r2) ; Get the status flags
776 rlwimi r19,r11,floatCngbit-vmmFloatCngdb,vmmFloatCngdb,vmmVectCngdb ; Shift and insert changed bits
778 rlwimi r11,r19,vmmSpfSaveb,floatCngbit,vectorCngbit ; Restore the saved part of the spf
782 stw r19,vmmFlags(r2) ; Set the status flags
791 rlwimi r19,r18,FamVMmodebit-vmmFAMmodeb,vmmFAMmodeb,vmmFAMmodeb ; Shift and insert changed bits
808 stw r19,vmmStat(r5) ; Save the changed and popped flags
838 lwz r19,vmmFlags(r2) ; Get the status flags
841 rlwimi r19,r11,floatCngbit-vmmFloatCngdb,vmmFloatCngdb,vmmVectCngdb ; Shift and insert changed bits
843 rlwimi r11,r19,vmmSpfSaveb,floatCngbit,vectorCngbit ; Restore the saved part of the spf
858 rlwimi r19,r18,FamVMmodebit-vmmFAMmodeb,vmmFAMmodeb,vmmFAMmodeb ; Shift and insert changed bits
873 stw r19,vmmStat(r5) ; Save the changed and popped flags
930 lwz r19,vmmppcr2(r5)
963 stw r19,saver2+4(r30)
986 lwz r19,vmmppcr10(r5)
1007 stw r19,saver10+4(r30)
1027 lwz r19,vmmppcr18(r5)
1048 stw r19,saver18+4(r30)
1068 lwz r19,vmmppcr26(r5)
1089 stw r19,saver26+4(r30)
1108 lwz r19,vmmppclr(r5)
1124 stw r19,savelr+4(r30)
1141 lwz r19,vmmppcfpscrpad(r5)
1155 stw r19,savefpscrpad(r30)
1236 lwz r19,vmmppcr2(r5)
1273 ld r19,vmmppcXr2(r5)
1304 std r19,saver2(r30)
1329 lwz r19,vmmppcr10(r5)
1351 ld r19,vmmppcXr10(r5)
1372 std r19,saver10(r30)
1394 lwz r19,vmmppcr18(r5)
1416 ld r19,vmmppcXr18(r5)
1437 std r19,saver18(r30)
1459 lwz r19,vmmppcr26(r5)
1480 ld r19,vmmppcXr26(r5)
1501 std r19,saver26(r30)
1522 lwz r19,vmmppclr(r5)
1539 ld r19,vmmppcXlr(r5)
1555 std r19,savelr(r30)
1572 lwz r19,vmmppcfpscrpad(r5)
1586 stw r19,savefpscrpad(r30)
2115 stw r19,saver19+4(r3) ; Save r19
2143 std r19,saver19(r3) ; Save r19
2185 lwz r19,saver19+4(r3) ; Load r19
2213 ld r19,saver19(r3) ; Load r19
2298 std r19,saver19(r3) ; Save r19
2340 ld r19,saver19(r3) ; Load r19