Lines Matching refs:save_srr1
191 ts->srr1 = (unsigned int)sv->save_srr1;
263 xts->srr1 = sv->save_srr1;
512 ts->srr1 = (unsigned int)sv->save_srr1;
584 xts->srr1 = sv->save_srr1;
783 genuser->save_srr1 = MSR_PREPARE_FOR_IMPORT(genuser->save_srr1, ts->srr1); /* Set the bits we can change */
785 genuser->save_srr1 |= MSR_EXPORT_MASK_SET;
787 genuser->save_srr1 &= ~(MASK(MSR_FP) | MASK(MSR_VEC)); /* Make sure we don't enable the floating point unit */
790 genuser->save_srr1 |= (uint64_t)MASK32(MSR_SF) << 32; /* If 64-bit task, force 64-bit mode */
792 genuser->save_srr1 &= ~((uint64_t)MASK32(MSR_SF) << 32); /* else 32-bit mode */
841 genuser->save_srr1 = MSR_PREPARE_FOR_IMPORT(genuser->save_srr1, xts->srr1); /* Set the bits we can change */
843 genuser->save_srr1 |= MSR_EXPORT_MASK_SET;
845 genuser->save_srr1 &= ~(MASK(MSR_FP) | MASK(MSR_VEC)); /* Make sure we don't enable the floating point unit */
848 genuser->save_srr1 |= (uint64_t)MASK32(MSR_SF) << 32; /* If 64-bit task, force 64-bit mode */
850 genuser->save_srr1 &= ~((uint64_t)MASK32(MSR_SF) << 32); /* else 32-bit mode */
984 genuser->save_srr1 = (uint64_t)MSR_EXPORT_MASK_SET;
987 genuser->save_srr1 |= (uint64_t)MASK32(MSR_SF) << 32; /* If 64-bit task, force 64-bit mode */
1051 sv->save_srr1 &= (uint64_t)(~(MASK(MSR_FP) | MASK(MSR_VEC))); /* Make certain that floating point and vector are turned off */
1140 sv->save_srr1 = (uint64_t)MSR_EXPORT_MASK_SET;
1142 sv->save_srr1 |= (uint64_t)MASK32(MSR_SF) << 32; /* If 64-bit task, force 64-bit mode */
1387 sv->save_srr1 |= MASK(MSR_SE);
1389 sv->save_srr1 &= ~MASK(MSR_SE);
1574 sv->save_srr1 &= (uint64_t)(~(MASK(MSR_FP) | MASK(MSR_VEC))); /* Make certain that floating point and vector are turned off */
1677 if(osv->save_srr1 & MASK(MSR_PR)) break; /* Leave if this is user state */
1814 oldmsr = sv->save_srr1; /* Get the old msr */
1816 if(onoff) sv->save_srr1 = oldmsr | (uint64_t)(MASK(MSR_FE0) | MASK(MSR_FE1)); /* Flip on precise FP exceptions */
1817 else sv->save_srr1 = oldmsr & (uint64_t)(~(MASK(MSR_FE0) | MASK(MSR_FE1))); /* Flip on precise FP exceptions */