Lines Matching refs:chan
98 #define scc_init_reg(regs,chan) { \
100 scc_get_datum(regs, ((chan)<<1),tmp); \
101 scc_get_datum(regs, ((chan)<<1),tmp); \
104 #define scc_read_reg(regs,chan,reg,val) { \
105 scc_set_datum(regs, ((chan)<<1),reg); \
106 scc_get_datum(regs, ((chan)<<1),val); \
109 #define scc_read_reg_zero(regs,chan,val) { \
110 scc_get_datum(regs, ((chan)<<1),val); \
113 #define scc_write_reg(regs,chan,reg,val) { \
114 scc_set_datum(regs, ((chan)<<1),reg); \
115 scc_set_datum(regs, ((chan)<<1),val); \
118 #define scc_write_reg_zero(regs,chan,val) { \
119 scc_set_datum(regs, ((chan)<<1),val); \
122 #define scc_read_data(regs,chan,val) { \
123 scc_get_datum(regs, ((chan)<<1)+SCC_DATA_OFFSET,val); \
126 #define scc_write_data(regs,chan,val) { \
127 scc_set_datum(regs, ((chan)<<1)+SCC_DATA_OFFSET,val); \
222 #define scc_get_timing_base(scc,chan,val) { \
224 scc_read_reg(scc,chan,SCC_RR12,val);\
225 scc_read_reg(scc,chan,SCC_RR13,tmp);\
356 #define scc_set_timing_base(scc,chan,val) { \
357 scc_write_reg(scc,chan,SCC_RR12,val);\
358 scc_write_reg(scc,chan,SCC_RR13,(val)>>8);\