Lines Matching refs:pf
374 if (proc_info->pf.Available & (pfCanDoze|pfWillNap))
425 if((proc_info->pf.pfPowerModes & pmType) == pmPowerTune) {
426 proc_info->pf.pfPowerTune0 = in_processor_info->power_mode_0;
427 proc_info->pf.pfPowerTune1 = in_processor_info->power_mode_1;
433 if((proc_info->pf.Available & pfCanNap)
435 proc_info->pf.Available |= pfWillNap;
438 __asm__ volatile("mtsprg 2,%0" : : "r" (proc_info->pf.Available)); /* Set live value */
476 prev_value = (proc_info->pf.Available & pfCanNap) && (proc_info->pf.Available & pfWillNap);
480 if(proc_info->pf.Available & pfCanNap) { /* Can the processor nap? */
481 if (nap_enabled) proc_info->pf.Available |= pfWillNap; /* Is nap supported on this machine? */
482 else proc_info->pf.Available &= ~pfWillNap; /* Clear if not */
487 __asm__ volatile("mtsprg 2,%0" : : "r" (proc_info->pf.Available)); /* Set live value */
593 ml_cpu_info->vector_unit = (proc_info->pf.Available & pfAltivec) != 0;
594 ml_cpu_info->cache_line_size = proc_info->pf.lineSize;
595 ml_cpu_info->l1_icache_size = proc_info->pf.l1iSize;
596 ml_cpu_info->l1_dcache_size = proc_info->pf.l1dSize;
598 if (proc_info->pf.Available & pfL2) {
599 ml_cpu_info->l2_settings = proc_info->pf.l2cr;
600 ml_cpu_info->l2_cache_size = proc_info->pf.l2Size;
605 if (proc_info->pf.Available & pfL3) {
606 ml_cpu_info->l3_settings = proc_info->pf.l3cr;
607 ml_cpu_info->l3_cache_size = proc_info->pf.l3Size;
630 available = proc_info->pf.Available;
633 ccr = proc_info->pf.l2cr;
636 if (enable) ccr = proc_info->pf.l2crOriginal;
638 proc_info->pf.l2cr = ccr;
646 ccr = proc_info->pf.l3cr;
649 if (enable) ccr = proc_info->pf.l3crOriginal;
651 proc_info->pf.l3cr = ccr;
677 switch (proc_info->pf.pfPowerModes & pmType) { /* Figure specific type */