Lines Matching refs:vector
143 rlwinm. r6,r31,0,MSR_VEC_BIT,MSR_VEC_BIT ; Was vector on?
231 lis r10,hi16(MASK(MSR_VEC)) ; Get the vector enable
332 rlwinm. r6,r7,0,MSR_VEC_BIT,MSR_VEC_BIT ; Was vector on?
676 lis r10,hi16(MASK(MSR_VEC)) ; Get the vector enable
781 lis r10,hi16(MASK(MSR_VEC)) ; Get the vector enable
902 rlwinm. r16,r10,0,MSR_VEC_BIT,MSR_VEC_BIT ; Was vector on?
1033 lis r10,hi16(MASK(MSR_VEC)) ; Get the vector enable
1102 ; This section is common to all exception exits. It throws away vector
1137 rlwinm r29,r29,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Turn off vector for now
1437 rlwinm r20,r29,(((31-vectorCngbit)+(MSR_VEC_BIT+1))&31),vectorCngbit,vectorCngbit ; Set flag if we enabled vector
1442 beq setenaa ; Neither float nor vector turned on....
1446 or r5,r5,r20 ; Set vector/float changed bits in activation
1447 or r6,r6,r20 ; Set vector/float changed bits in per_proc
1784 lwz r20,facctx+VMXsave(r24) ; (TEST/DEBUG) Get regular vector point
1785 li r21,SAVvector ; (TEST/DEBUG) Make sure this is all vector
1808 lwz r20,vmmFacCtx+VMXsave(r29) ; (TEST/DEBUG) Get regular vector point
1809 li r21,SAVvector ; (TEST/DEBUG) Make sure this is all vector