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Lines Matching refs:this

8  * Version 2.0 (the 'License'). You may not use this file except in
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
189 bne++ cswnofloat ; Level not the same, this is not live...
191 cmplw r5,r0 ; Still owned by this cpu?
201 lwz r5,SAVprev+4(r10) ; Get the previous of this savearea
206 stw r5,FPUsave(r2) ; Pop off this savearea
237 bne++ cswnovect ; Level not the same, this is not live...
239 cmplw r5,r0 ; Still owned by this cpu?
249 lwz r5,SAVprev+4(r10) ; Get the previous of this savearea
254 stw r5,VMXsave(r2) ; Pop off this savearea
330 * with translation on. If we could, this should be done in lowmem_vectors
377 * It is really not too cool to do this, but what the hey... Anyway,
378 * we turn fpus and vecs off before we leave., The oddity is that if you use fpus after this, the
426 cmplw r9,r11 ; Was the context for this processor?
428 bne-- fsret ; Facility not last used on this processor...
431 ; It looks like we need to save this one.
470 cmplw r5,r11 ; Is this for the same processor?
474 cmplwi r7,0 ; Have we ever saved this facility context?
477 lwz r8,SAVlevel(r7) ; Get the level of this savearea
487 stb r4,SAVflags+2(r3) ; Mark this savearea as a float
490 stw r4,SAVact(r3) ; Indicate the right activation for this context
492 stw r3,FPUsave(r12) ; Set this as the most current floating point context
493 stw r8,SAVprev+4(r3) ; And then chain this in front
669 li r3,0 ; Clear this
671 bne-- fsnosavelk ; Something has changed, so this is not ours to save...
700 stw r3,FPUsave(r22) ; Set this as the latest context savearea for the thread
718 ; Check if we need to fill the registers with junk, because this level has
817 // Note this code is used both by 32- and 128-byte processors. This means six extra DCBTs
876 rlwinm. r0,r8,0,MSR_PR_BIT,MSR_PR_BIT ; See if we are doing this for user state
983 ; Note that we need to choke in this code rather than panic because there is no
1034 ; Note that at this point, since floats are on, we are the owner
1035 ; of live state on this processor
1039 li r0,0 ; Clear this just in case we need it
1084 * It is really not too cool to do this, but what the hey... Anyway,
1086 * The oddity is that if you use vectors after this, the
1139 cmplw r9,r11 ; Was the context for this processor?
1144 ; It looks like we need to save this one. Or possibly toss a saved one if
1186 cmplw r5,r11 ; Is this for the same processor?
1190 cmplwi r7,0 ; Have we ever saved this facility context?
1193 lwz r8,SAVlevel(r7) ; Get the level this savearea is for
1202 stw r4,VMXsave(r12) ; Dequeue this savearea
1227 stb r4,SAVflags+2(r3) ; Mark this savearea as a vector
1233 stw r4,SAVact(r3) ; Indicate the right activation for this context
1235 stw r3,VMXsave(r12) ; Set this as the most current floating point context
1236 stw r8,SAVprev+4(r3) ; And then chain this in front
1405 bne-- vswnosavelk ; Something has changed, so this is not ours to save...
1425 li r5,0 ; Assume this is the only one (which should be the ususal case)
1426 mr. r4,r4 ; Was this the only one?
1427 stw r4,VMXsave(r22) ; Dequeue this savearea
1446 stw r3,VMXsave(r22) ; Set this as the latest context savearea for the thread
1466 ; Check if we need to fill the registers with junk, because this level has
1555 vmrghh v31,v30,v31 ; Get 0x7FFFDEAD. V31 keeps this value until the bitter end
1594 rlwinm. r0,r8,0,MSR_PR_BIT,MSR_PR_BIT ; See if we are doing this for user state
1715 ; Note that at this point, since vecs are on, we are the owner
1716 ; of live state on this processor
1720 li r0,0 ; Clear this just in case we need it
1802 vtnoprev: stw r8,VMXsave(r3) ; Dequeue this savearea
1990 la r11,savevr0(r3) ; get address of this group of registers in save area
2003 la r11,savevr8(r3) ; get address of this group of registers in save area
2016 la r11,savevr16(r3) ; get address of this group of registers in save area
2029 la r11,savevr24(r3) ; get address of this group of registers in save area
2050 bf 0,vr_st32b ; skip if neither VR in this pair is in use
2051 la r11,savevr0(r3) ; get address of this group of registers in save area
2057 bf 2,vr_st32c ; skip if neither VR in this pair is in use
2058 la r11,savevr2(r3) ; get address of this group of registers in save area
2064 bf 4,vr_st32d ; skip if neither VR in this pair is in use
2065 la r11,savevr4(r3) ; get address of this group of registers in save area
2071 bf 6,vr_st32e ; skip if neither VR in this pair is in use
2072 la r11,savevr6(r3) ; get address of this group of registers in save area
2078 bf 8,vr_st32f ; skip if neither VR in this pair is in use
2079 la r11,savevr8(r3) ; get address of this group of registers in save area
2085 bf 10,vr_st32g ; skip if neither VR in this pair is in use
2086 la r11,savevr10(r3) ; get address of this group of registers in save area
2092 bf 12,vr_st32h ; skip if neither VR in this pair is in use
2093 la r11,savevr12(r3) ; get address of this group of registers in save area
2099 bf 14,vr_st32i ; skip if neither VR in this pair is in use
2100 la r11,savevr14(r3) ; get address of this group of registers in save area
2106 bf 16,vr_st32j ; skip if neither VR in this pair is in use
2107 la r11,savevr16(r3) ; get address of this group of registers in save area
2113 bf 18,vr_st32k ; skip if neither VR in this pair is in use
2114 la r11,savevr18(r3) ; get address of this group of registers in save area
2120 bf 20,vr_st32l ; skip if neither VR in this pair is in use
2121 la r11,savevr20(r3) ; get address of this group of registers in save area
2127 bf 22,vr_st32m ; skip if neither VR in this pair is in use
2128 la r11,savevr22(r3) ; get address of this group of registers in save area
2134 bf 24,vr_st32n ; skip if neither VR in this pair is in use
2135 la r11,savevr24(r3) ; get address of this group of registers in save area
2141 bf 26,vr_st32o ; skip if neither VR in this pair is in use
2142 la r11,savevr26(r3) ; get address of this group of registers in save area
2148 bf 28,vr_st32p ; skip if neither VR in this pair is in use
2149 la r11,savevr28(r3) ; get address of this group of registers in save area
2155 bflr 30 ; done if neither VR in this pair is in use
2156 la r11,savevr30(r3) ; get address of this group of registers in save area
2170 // in a cache line, we bug them. Note that this behavior is slightly different from earlier kernels,
2207 andc r10,r10,r9 ; turn off the bits in this line
2236 bt 0,vr_ld128a ; skip if this line must be loaded
2246 vr_ld128a: ; must load from this line
2258 bt 8,vr_ld128c ; skip if this line must be loaded
2268 vr_ld128c: ; must load from this line
2280 bt 16,vr_ld128e ; skip if this line must be loaded
2290 vr_ld128e: ; must load from this line
2302 bt 24,vr_ld128g ; skip if this line must be loaded
2311 vr_ld128g: ; must load from this line
2330 bt 0,vr_ld32load0 ; skip if we must load this line
2334 vr_ld32load0: ; must load VRs in this line
2340 bt 2,vr_ld32load2 ; skip if we must load this line
2344 vr_ld32load2: ; must load VRs in this line
2350 bt 4,vr_ld32load4 ; skip if we must load this line
2354 vr_ld32load4: ; must load VRs in this line
2360 bt 6,vr_ld32load6 ; skip if we must load this line
2364 vr_ld32load6: ; must load VRs in this line
2370 bt 8,vr_ld32load8 ; skip if we must load this line
2374 vr_ld32load8: ; must load VRs in this line
2380 bt 10,vr_ld32load10 ; skip if we must load this line
2384 vr_ld32load10: ; must load VRs in this line
2390 bt 12,vr_ld32load12 ; skip if we must load this line
2394 vr_ld32load12: ; must load VRs in this line
2400 bt 14,vr_ld32load14 ; skip if we must load this line
2404 vr_ld32load14: ; must load VRs in this line
2410 bt 16,vr_ld32load16 ; skip if we must load this line
2414 vr_ld32load16: ; must load VRs in this line
2420 bt 18,vr_ld32load18 ; skip if we must load this line
2424 vr_ld32load18: ; must load VRs in this line
2430 bt 20,vr_ld32load20 ; skip if we must load this line
2434 vr_ld32load20: ; must load VRs in this line
2440 bt 22,vr_ld32load22 ; skip if we must load this line
2444 vr_ld32load22: ; must load VRs in this line
2450 bt 24,vr_ld32load24 ; skip if we must load this line
2454 vr_ld32load24: ; must load VRs in this line
2460 bt 26,vr_ld32load26 ; skip if we must load this line
2464 vr_ld32load26: ; must load VRs in this line
2470 bt 28,vr_ld32load28 ; skip if we must load this line
2474 vr_ld32load28: ; must load VRs in this line
2480 bt 30,vr_ld32load30 ; skip if we must load this line
2483 vr_ld32load30: ; must load VRs in this line