Lines Matching refs:r2
147 lwz r2,umwRelo+4(r5) ; Get user memory window relocation bottom
156 stw r2,ppUMWmp+mpNestReloc+4(r12) ; Save bottom part of physical address
158 lwz r2,traceMask(0) ; Get the enabled traces
161 mr. r2,r2 ; Any tracing going on?
166 li r2,0x4400 ; Trace ID
170 cswNoTrc: lwz r2,curctx(r5) ; Grab our current context pointer
178 cmplw r10,r2 ; Do we have the live float context?
179 lwz r10,FPUlevel(r2) ; Get the live level
181 cmplw cr5,r9,r2 ; Do we have the live vector context?
188 lwz r5,FPUcpu(r2) ; Get the owning cpu
192 lwz r10,FPUsave(r2) ; Get the pointer to next saved context
206 stw r5,FPUsave(r2) ; Pop off this savearea
222 mr r7,r2 ; (TEST/DEBUG)
223 li r2,0x4401 ; (TEST/DEBUG)
227 mr r2,r7 ; (TEST/DEBUG)
232 lwz r10,VMXlevel(r2) ; Get the live level
236 lwz r5,VMXcpu(r2) ; Get the owning cpu
240 lwz r10,VMXsave(r2) ; Get the level
254 stw r5,VMXsave(r2) ; Pop off this savearea
259 lwz r2,SACvrswap(r3) ; Get the virtual to real conversion (top)
264 stw r2,quickfret(r12) ; Set the first in quickfret list (top)
269 li r2,0x4501 ; (TEST/DEBUG)
387 lis r2,hi16(MASK(MSR_VEC)) ; Get the vector enable
389 ori r2,r2,lo16(MASK(MSR_FP)) ; Get FP
392 andc r0,r0,r2 ; Clear FP, VEC
393 andc r2,r0,r12 ; Clear EE
394 ori r2,r2,MASK(MSR_FP) ; Enable the floating point feature for now also
395 mtmsr r2 ; Set the MSR
408 li r2,0x6F00 ; (TEST/DEBUG)
419 mflr r2 ; Save the return address
498 mtlr r2 ; Restore return
572 li r2,0x7F01 ; (TEST/DEBUG)
680 li r2,0x7F02 ; (TEST/DEBUG)
704 li r2,0x7F03 ; (TEST/DEBUG)
765 li r2,0x7F04 ; (TEST/DEBUG)
809 li r2,0x7F05 ; (TEST/DEBUG)
886 li r2,0x7F07 ; (TEST/DEBUG)
901 li r2,0x7F06 ; (TEST/DEBUG)
964 li r2,0x7F0A ; (TEST/DEBUG)
1098 lis r2,hi16(MASK(MSR_VEC)) ; Get VEC
1100 ori r2,r2,lo16(MASK(MSR_FP)) ; Add in FP
1101 andc r0,r0,r2 ; Force off VEC and FP
1102 ori r2,r2,lo16(MASK(MSR_EE)) ; Clear EE
1103 andc r2,r0,r2 ; Clear EE for now
1104 oris r2,r2,hi16(MASK(MSR_VEC)) ; Enable the vector facility for now also
1105 mtmsr r2 ; Set the MSR
1119 li r2,0x5F00 ; (TEST/DEBUG)
1132 mflr r2 ; Save the return address
1247 mtlr r2 ; Restore return address
1313 li r2,0x5F01 ; (TEST/DEBUG)
1414 li r2,0x5F02 ; (TEST/DEBUG)
1455 li r2,0x5F03 ; (TEST/DEBUG)
1525 li r2,0x5F04 ; (TEST/DEBUG)
1571 li r2,0x5F05 ; (TEST/DEBUG)
1604 li r2,0x5F07 ; (TEST/DEBUG)
1618 li r2,0x5F06 ; (TEST/DEBUG)
1671 li r2,0x5F0A ; (TEST/DEBUG)