Lines Matching refs:any
12 * circumvent, violate, or enable the circumvention or violation of, any
309 ; any float or vector states for the ditched level.
472 bne-- fsretlk ; Not the same processor, skip any save...
581 mr. r22,r22 ; See if there is any live FP status
654 ; cpu indicator will always change if another processor mucked with any
657 ; It should be very rare that any of the context stuff changes across the lock.
1010 ; This function invalidates any live floating point context for the passed in facility_context.
1080 * don't want to load any registers we don't have a copy of, we want to set them
1188 bne-- vsretlk ; Not the same processor, skip any save...
1323 mr. r22,r22 ; See if there is any live vector status
1387 ; cpu indicator will always change if another processor mucked with any
1390 ; It should be very rare that any of the context stuff changes across the lock.
1691 ; This function invalidates any live vector context for the passed in facility_context.
1755 ; This function invalidates any live vector context for the passed in facility_context
1768 lwz r9,VMXsave(r3) ; Get the savearea, if any
1975 or r8,r7,r8 ; show if any in group of 4 are in use
1979 or r11,r7,r8 ; show if any in group of 8 are in use
2169 // branches by loading all VRs from a cache line, if we have to load any. If we don't load the VRs
2220 // r5 = 1st bit in each cacheline is 1 iff any reg in that line must be loaded
2323 // r5 = 1st bit in each cacheline is 1 iff any reg in that line must be loaded