Lines Matching refs:UInt32
30 typedef unsigned long UInt32;
36 UInt32 pc;
37 UInt32 gpr0;
38 UInt32 intControlAddr;
39 UInt32 newState;
40 UInt32 intStateMask;
41 UInt32 intCR2Mask;
42 UInt32 intCR2Shift;
43 UInt32 sysContextState;
54 UInt32 pc;
55 UInt32 sp;
56 UInt32 gpr0;
57 UInt32 gpr3;
58 UInt32 cr;
59 UInt32 intControlAddr;
60 UInt32 newState;
61 UInt32 intStateMask;
62 UInt32 intCR2Mask;
63 UInt32 intCR2Shift;
64 UInt32 sysContextState;
65 UInt32 intPendingMask;
66 UInt32 intPendingPC;
67 UInt32 msrUpdate;
76 UInt32 bootstrapVersionOffset; // offset within emulator data page of the bootstrap version string
77 UInt32 ecbOffset; // offset within emulator data page of the ECB
78 UInt32 intModeLevelOffset; // offset within emulator data page of the interrupt mode level
79 UInt32 entryAddress; // offset within text of the emulator's main entry point
80 UInt32 kcallTrapTableOffset; // offset within text of the nanokernel(!) call trap table
81 UInt32 postIntMask; // post interrupt mask
82 UInt32 clearIntMask; // clear interrupt mask
83 UInt32 testIntMask; // test interrupt mask
84 UInt32 codeSize; // total size of emulator object code (interpretive + DR)
85 UInt32 hashTableSize; // size of DR emulator's hash table
86 UInt32 drCodeStartOffset; // offset within text of the DR emulator's object code
87 UInt32 drInitOffset; // offset within DR emulator of its initialization entry point
88 UInt32 drAllocateCache; // offset within DR emulator of its cache allocation entry point
89 UInt32 dispatchTableOffset; // offset within text of the encoded instruction dispatch table
96 // The following define the UInt32 gInterruptState