Lines Matching refs:bit
72 bf-- pf64Bitb,emn64 ; Skip if not 64-bit
73 b EXT(Emulate64) ; Jump to the 64-bit code...
102 rlwimi r20,r10,8,17,17 ; Move bit 25 to bit 17
105 rlwimi r20,r10,3,18,21 ; Move bit 21-24 to bit 18-21
168 or r3,r23,r3 ; Turn on the DR and RI bit if translation was on
192 oris r4,r4,hi16(SAVredrive) ; Set the redrive bit
222 bf-- pf64Bitb,aan64 ; Skip if not 64-bit
223 b EXT(AlignAssist64) ; Jump to the 64-bit code...
346 ; the instruction is not to be emulated. Then we add bit 0 of the code * 4. This
356 rlwimi r19,r26,20,27,27 ; Get bit 0 of instruction code * 4 into bottom of table base
1023 oris r9,r9,hi16(SAVredrive) ; Set the redrive bit
1040 oris r4,r4,hi16(SAVredrive) ; Set the redrive bit