Lines Matching refs:ifps
94 static void configure_mxcsr_capability_mask(struct x86_fpsave_state *ifps);
108 configure_mxcsr_capability_mask(struct x86_fpsave_state *ifps)
111 assert(ALIGNED(ifps,16));
113 bzero(ifps, sizeof(*ifps));
117 __asm__ volatile("fxsave %0" : "=m" (ifps->fx_save_state));
118 mxcsr_capability_mask = ifps->fx_save_state.fx_MXCSR_MASK;
135 struct x86_fpsave_state *ifps;
137 ifps = (struct x86_fpsave_state *)zalloc(ifps_zone);
138 assert(ALIGNED(ifps,16));
139 bzero((char *)ifps, sizeof *ifps);
141 return ifps;
145 fp_state_free(struct x86_fpsave_state *ifps)
147 zfree(ifps_zone, ifps);
251 struct x86_fpsave_state *ifps;
271 ifps = pcb->ifps;
272 pcb->ifps = 0;
276 if (ifps != 0)
277 fp_state_free(ifps);
286 ifps = pcb->ifps;
287 if (ifps == 0) {
293 ifps = new_ifps;
295 pcb->ifps = ifps;
301 (char *)&ifps->fx_save_state, sizeof(struct x86_fx_save));
306 ifps->fp_save_layout = thread_is_64bit(thr_act) ? FXSAVE64 : FXSAVE32;
309 * ifps->fp_valid = TRUE;
316 ifps->fx_save_state.fx_MXCSR &= mxcsr_capability_mask;
337 struct x86_fpsave_state *ifps;
352 ifps = pcb->ifps;
353 if (ifps == 0) {
379 if (ifps->fp_valid) {
380 bcopy((char *)&ifps->fx_save_state,
409 if (ppcb->ifps == NULL)
412 if (child->machine.pcb->ifps)
413 panic("fpu_dup_fxstate: child's ifps non-null");
419 if (ppcb->ifps != NULL) {
431 if (ppcb->ifps->fp_valid) {
432 child->machine.pcb->ifps = new_ifps;
434 bcopy((char *)&(ppcb->ifps->fx_save_state),
435 (char *)&(child->machine.pcb->ifps->fx_save_state), sizeof(struct x86_fx_save));
437 new_ifps->fp_save_layout = ppcb->ifps->fp_save_layout;
494 struct x86_fpsave_state *ifps = 0;
499 if (pcb->ifps == 0 && !get_interrupt_level())
500 ifps = fp_state_alloc();
514 if (pcb->ifps == 0) {
515 pcb->ifps = ifps;
516 ifps = 0;
525 if (ifps)
526 fp_state_free(ifps);
539 struct x86_fpsave_state *ifps;
555 ifps = pcb->ifps;
556 pcb->ifps = 0;
572 if (ifps)
573 zfree(ifps_zone, ifps);
590 struct x86_fpsave_state *ifps = thr_act->machine.pcb->ifps;
609 * Locking not needed on pcb->ifps,
614 ifps->fx_save_state.fx_status);
634 struct x86_fpsave_state *ifps = pcb->ifps;
636 if (ifps != 0 && !ifps->fp_valid) {
639 ifps->fp_valid = TRUE;
643 fxsave(&ifps->fx_save_state);
644 ifps->fp_save_layout = FXSAVE32;
647 fxsave64(&ifps->fx_save_state);
648 ifps->fp_save_layout = FXSAVE64;
664 struct x86_fpsave_state *ifps;
666 ifps = pcb->ifps;
667 if (ifps == 0 || ifps->fp_valid == FALSE) {
668 if (ifps == 0) {
672 ifps = fp_state_alloc();
673 pcb->ifps = ifps;
677 assert(ifps->fp_save_layout == FXSAVE32 || ifps->fp_save_layout == FXSAVE64);
678 if (ifps->fp_save_layout == FXSAVE32) {
680 fxrstor(&ifps->fx_save_state);
682 else if (ifps->fp_save_layout == FXSAVE64) {
683 fxrstor64(&ifps->fx_save_state);
686 ifps->fp_valid = FALSE; /* in FPU */
713 struct x86_fpsave_state *ifps = thr_act->machine.pcb->ifps;
731 * Locking not needed on pcb->ifps,
734 assert(ifps->fp_save_layout == FXSAVE32 || ifps->fp_save_layout == FXSAVE64);
737 ifps->fx_save_state.fx_status);
745 struct x86_fpsave_state *ifps = thr_act->machine.pcb->ifps;
747 if (ifps) {
748 ifps->fp_valid = value;