Lines Matching refs:_HBit
50 #define _HBit(n) (1ULL << ((n)+32))
86 #define CPUID_FEATURE_SSE3 _HBit(0) /* Streaming SIMD extensions 3 */
87 #define CPUID_FEATURE_MONITOR _HBit(3) /* Monitor/mwait */
88 #define CPUID_FEATURE_DSCPL _HBit(4) /* Debug Store CPL */
89 #define CPUID_FEATURE_VMX _HBit(5) /* VMX */
90 #define CPUID_FEATURE_SMX _HBit(6) /* SMX */
91 #define CPUID_FEATURE_EST _HBit(7) /* Enhanced SpeedsTep (GV3) */
92 #define CPUID_FEATURE_TM2 _HBit(8) /* Thermal Monitor 2 */
93 #define CPUID_FEATURE_SSSE3 _HBit(9) /* Supplemental SSE3 instructions */
94 #define CPUID_FEATURE_CID _HBit(10) /* L1 Context ID */
95 #define CPUID_FEATURE_CX16 _HBit(13) /* CmpXchg16b instruction */
96 #define CPUID_FEATURE_xTPR _HBit(14) /* Send Task PRiority msgs */
97 #define CPUID_FEATURE_PDCM _HBit(15) /* Perf/Debug Capability MSR */
98 #define CPUID_FEATURE_DCA _HBit(18) /* Direct Cache Access */
99 #define CPUID_FEATURE_SSE4_1 _HBit(19) /* Streaming SIMD extensions 4.1 */
100 #define CPUID_FEATURE_SSE4_2 _HBit(20) /* Streaming SIMD extensions 4.2 */
101 #define CPUID_FEATURE_xAPIC _HBit(21) /* Extended APIC Mode */
102 #define CPUID_FEATURE_POPCNT _HBit(23) /* POPCNT instruction */
113 #define CPUID_EXTFEATURE_LAHF _HBit(20) /* LAFH/SAHF instructions */