Lines Matching refs:_Bit
49 #define _Bit(n) (1ULL << n)
56 #define CPUID_FEATURE_FPU _Bit(0) /* Floating point unit on-chip */
57 #define CPUID_FEATURE_VME _Bit(1) /* Virtual Mode Extension */
58 #define CPUID_FEATURE_DE _Bit(2) /* Debugging Extension */
59 #define CPUID_FEATURE_PSE _Bit(3) /* Page Size Extension */
60 #define CPUID_FEATURE_TSC _Bit(4) /* Time Stamp Counter */
61 #define CPUID_FEATURE_MSR _Bit(5) /* Model Specific Registers */
62 #define CPUID_FEATURE_PAE _Bit(6) /* Physical Address Extension */
63 #define CPUID_FEATURE_MCE _Bit(7) /* Machine Check Exception */
64 #define CPUID_FEATURE_CX8 _Bit(8) /* CMPXCHG8B */
65 #define CPUID_FEATURE_APIC _Bit(9) /* On-chip APIC */
66 #define CPUID_FEATURE_SEP _Bit(11) /* Fast System Call */
67 #define CPUID_FEATURE_MTRR _Bit(12) /* Memory Type Range Register */
68 #define CPUID_FEATURE_PGE _Bit(13) /* Page Global Enable */
69 #define CPUID_FEATURE_MCA _Bit(14) /* Machine Check Architecture */
70 #define CPUID_FEATURE_CMOV _Bit(15) /* Conditional Move Instruction */
71 #define CPUID_FEATURE_PAT _Bit(16) /* Page Attribute Table */
72 #define CPUID_FEATURE_PSE36 _Bit(17) /* 36-bit Page Size Extension */
73 #define CPUID_FEATURE_PSN _Bit(18) /* Processor Serial Number */
74 #define CPUID_FEATURE_CLFSH _Bit(19) /* CLFLUSH Instruction supported */
75 #define CPUID_FEATURE_DS _Bit(21) /* Debug Store */
76 #define CPUID_FEATURE_ACPI _Bit(22) /* Thermal monitor and Clock Ctrl */
77 #define CPUID_FEATURE_MMX _Bit(23) /* MMX supported */
78 #define CPUID_FEATURE_FXSR _Bit(24) /* Fast floating pt save/restore */
79 #define CPUID_FEATURE_SSE _Bit(25) /* Streaming SIMD extensions */
80 #define CPUID_FEATURE_SSE2 _Bit(26) /* Streaming SIMD extensions 2 */
81 #define CPUID_FEATURE_SS _Bit(27) /* Self-Snoop */
82 #define CPUID_FEATURE_HTT _Bit(28) /* Hyper-Threading Technology */
83 #define CPUID_FEATURE_TM _Bit(29) /* Thermal Monitor (TM1) */
84 #define CPUID_FEATURE_PBE _Bit(31) /* Pend Break Enable */
108 #define CPUID_EXTFEATURE_SYSCALL _Bit(11) /* SYSCALL/sysret */
109 #define CPUID_EXTFEATURE_XD _Bit(20) /* eXecute Disable */
110 #define CPUID_EXTFEATURE_RDTSCP _Bit(27) /* RDTSCP */
111 #define CPUID_EXTFEATURE_EM64T _Bit(29) /* Extended Mem 64 Technology */
119 #define CPUID_EXTFEATURE_TSCI _Bit(8) /* TSC Invariant */
214 #define CPUID_MWAIT_EXTENSION _Bit(0) /* enumeration of WMAIT extensions */
215 #define CPUID_MWAIT_BREAK _Bit(1) /* interrupts are break events */