Lines Matching defs:DCI
7146 // @param DCI Context.
7151 TargetLowering::DAGCombinerInfo &DCI,
7153 SelectionDAG &DAG = DCI.DAG;
7177 TargetLowering::DAGCombinerInfo &DCI) {
7181 SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes);
7186 SDValue Result = combineSelectAndUse(N, N1, N0, DCI, AllOnes);
7196 TargetLowering::DAGCombinerInfo &DCI,
7201 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON()
7255 SelectionDAG &DAG = DCI.DAG;
7290 TargetLowering::DAGCombinerInfo &DCI,
7296 if (DCI.isBeforeLegalize()) return SDValue();
7395 SelectionDAG &DAG = DCI.DAG;
7423 TargetLowering::DAGCombinerInfo &DCI,
7426 return AddCombineTo64bitMLAL(N, DCI, Subtarget);
7435 TargetLowering::DAGCombinerInfo &DCI,
7439 SDValue Result = AddCombineToVPADDL(N, N0, N1, DCI, Subtarget);
7445 SDValue Result = combineSelectAndUse(N, N0, N1, DCI);
7454 TargetLowering::DAGCombinerInfo &DCI,
7460 SDValue Result = PerformADDCombineWithOperands(N, N0, N1, DCI, Subtarget);
7465 return PerformADDCombineWithOperands(N, N1, N0, DCI, Subtarget);
7471 TargetLowering::DAGCombinerInfo &DCI) {
7477 SDValue Result = combineSelectAndUse(N, N1, N0, DCI);
7493 TargetLowering::DAGCombinerInfo &DCI,
7498 SelectionDAG &DAG = DCI.DAG;
7521 TargetLowering::DAGCombinerInfo &DCI,
7523 SelectionDAG &DAG = DCI.DAG;
7528 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer())
7533 return PerformVMULCombine(N, DCI, Subtarget);
7600 DCI.CombineTo(N, Res, false);
7605 TargetLowering::DAGCombinerInfo &DCI,
7612 SelectionDAG &DAG = DCI.DAG;
7639 SDValue Result = combineSelectAndUseCommutative(N, true, DCI);
7649 TargetLowering::DAGCombinerInfo &DCI,
7655 SelectionDAG &DAG = DCI.DAG;
7682 SDValue Result = combineSelectAndUseCommutative(N, false, DCI);
7770 DCI.CombineTo(N, Res, false);
7796 DCI.CombineTo(N, Res, false);
7812 DCI.CombineTo(N, Res, false);
7832 DCI.CombineTo(N, Res, false);
7839 TargetLowering::DAGCombinerInfo &DCI,
7842 SelectionDAG &DAG = DCI.DAG;
7849 SDValue Result = combineSelectAndUseCommutative(N, false, DCI);
7860 TargetLowering::DAGCombinerInfo &DCI) {
7872 return DCI.DAG.getNode(ARMISD::BFI, N->getDebugLoc(), N->getValueType(0),
7882 TargetLowering::DAGCombinerInfo &DCI) {
7886 return DCI.CombineTo(N, InDouble.getOperand(0), InDouble.getOperand(1));
7897 SelectionDAG &DAG = DCI.DAG;
7913 SDValue Result = DCI.CombineTo(N, NewLD1, NewLD2);
7914 DCI.RemoveFromWorklist(LD);
7943 TargetLowering::DAGCombinerInfo &DCI) {
7954 SelectionDAG &DAG = DCI.DAG;
8037 SelectionDAG &DAG = DCI.DAG;
8059 SelectionDAG &DAG = DCI.DAG;
8070 DCI.AddToWorklist(Vec.getNode());
8071 DCI.AddToWorklist(ExtElt.getNode());
8072 DCI.AddToWorklist(V.getNode());
8096 TargetLowering::DAGCombinerInfo &DCI){
8101 SelectionDAG &DAG = DCI.DAG;
8120 DCI.AddToWorklist(V.getNode());
8130 TargetLowering::DAGCombinerInfo &DCI) {
8139 SelectionDAG &DAG = DCI.DAG;
8146 DCI.AddToWorklist(Vec.getNode());
8147 DCI.AddToWorklist(V.getNode());
8209 TargetLowering::DAGCombinerInfo &DCI) {
8210 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer())
8213 SelectionDAG &DAG = DCI.DAG;
8330 DCI.CombineTo(N, NewResults);
8331 DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs));
8342 static bool CombineVLDDUP(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
8343 SelectionDAG &DAG = DCI.DAG;
8405 DCI.CombineTo(User, SDValue(VLDDup.getNode(), ResNo));
8414 DCI.CombineTo(VLD, VLDDupResults);
8422 TargetLowering::DAGCombinerInfo &DCI) {
8427 if (CombineVLDDUP(N, DCI))
8448 return DCI.DAG.getNode(ISD::BITCAST, N->getDebugLoc(), VT, Op);
8487 TargetLowering::DAGCombinerInfo &DCI,
8489 SelectionDAG &DAG = DCI.DAG;
8523 TargetLowering::DAGCombinerInfo &DCI,
8525 SelectionDAG &DAG = DCI.DAG;
8998 DAGCombinerInfo &DCI) const {
9001 case ISD::ADDC: return PerformADDCCombine(N, DCI, Subtarget);
9002 case ISD::ADD: return PerformADDCombine(N, DCI, Subtarget);
9003 case ISD::SUB: return PerformSUBCombine(N, DCI);
9004 case ISD::MUL: return PerformMULCombine(N, DCI, Subtarget);
9005 case ISD::OR: return PerformORCombine(N, DCI, Subtarget);
9006 case ISD::XOR: return PerformXORCombine(N, DCI, Subtarget);
9007 case ISD::AND: return PerformANDCombine(N, DCI, Subtarget);
9008 case ARMISD::BFI: return PerformBFICombine(N, DCI);
9009 case ARMISD::VMOVRRD: return PerformVMOVRRDCombine(N, DCI);
9010 case ARMISD::VMOVDRR: return PerformVMOVDRRCombine(N, DCI.DAG);
9011 case ISD::STORE: return PerformSTORECombine(N, DCI);
9012 case ISD::BUILD_VECTOR: return PerformBUILD_VECTORCombine(N, DCI);
9013 case ISD::INSERT_VECTOR_ELT: return PerformInsertEltCombine(N, DCI);
9014 case ISD::VECTOR_SHUFFLE: return PerformVECTOR_SHUFFLECombine(N, DCI.DAG);
9015 case ARMISD::VDUPLANE: return PerformVDUPLANECombine(N, DCI);
9017 case ISD::FP_TO_UINT: return PerformVCVTCombine(N, DCI, Subtarget);
9018 case ISD::FDIV: return PerformVDIVCombine(N, DCI, Subtarget);
9019 case ISD::INTRINSIC_WO_CHAIN: return PerformIntrinsicCombine(N, DCI.DAG);
9022 case ISD::SRL: return PerformShiftCombine(N, DCI.DAG, Subtarget);
9025 case ISD::ANY_EXTEND: return PerformExtendCombine(N, DCI.DAG, Subtarget);
9026 case ISD::SELECT_CC: return PerformSELECT_CCCombine(N, DCI.DAG, Subtarget);
9027 case ARMISD::CMOV: return PerformCMOVCombine(N, DCI.DAG);
9031 return CombineBaseUpdate(N, DCI);
9049 return CombineBaseUpdate(N, DCI);