Lines Matching refs:dd
310 void emitDoublePrecisionInstruction(ARMWord op, int dd, int dn, int dm)
312 ASSERT((dd >= 0 && dd <= 31) && (dn >= 0 && dn <= 31) && (dm >= 0 && dm <= 31));
313 m_buffer.putInt(op | ((dd & 0xf) << 12) | ((dd & 0x10) << (22 - 4))
495 void vmov_f64(int dd, int dm, Condition cc = AL)
497 emitDoublePrecisionInstruction(toARMWord(cc) | VMOV_F64, dd, 0, dm);
500 void vadd_f64(int dd, int dn, int dm, Condition cc = AL)
502 emitDoublePrecisionInstruction(toARMWord(cc) | VADD_F64, dd, dn, dm);
505 void vdiv_f64(int dd, int dn, int dm, Condition cc = AL)
507 emitDoublePrecisionInstruction(toARMWord(cc) | VDIV_F64, dd, dn, dm);
510 void vsub_f64(int dd, int dn, int dm, Condition cc = AL)
512 emitDoublePrecisionInstruction(toARMWord(cc) | VSUB_F64, dd, dn, dm);
515 void vmul_f64(int dd, int dn, int dm, Condition cc = AL)
517 emitDoublePrecisionInstruction(toARMWord(cc) | VMUL_F64, dd, dn, dm);
520 void vcmp_f64(int dd, int dm, Condition cc = AL)
522 emitDoublePrecisionInstruction(toARMWord(cc) | VCMP_F64, dd, 0, dm);
525 void vsqrt_f64(int dd, int dm, Condition cc = AL)
527 emitDoublePrecisionInstruction(toARMWord(cc) | VSQRT_F64, dd, 0, dm);
530 void vabs_f64(int dd, int dm, Condition cc = AL)
532 emitDoublePrecisionInstruction(toARMWord(cc) | VABS_F64, dd, 0, dm);
535 void vneg_f64(int dd, int dm, Condition cc = AL)
537 emitDoublePrecisionInstruction(toARMWord(cc) | VNEG_F64, dd, 0, dm);
650 void vcvt_f64_s32(int dd, int sm, Condition cc = AL)
653 emitDoublePrecisionInstruction(toARMWord(cc) | VCVT_F64_S32, dd, 0, (sm >> 1));
668 void vcvt_f64_f32(int dd, int sm, Condition cc = AL)
670 ASSERT(dd <= 15 && sm <= 15);
671 emitDoublePrecisionInstruction(toARMWord(cc) | VCVT_F64_F32, dd, 0, sm);
674 void vcvt_f32_f64(int dd, int sm, Condition cc = AL)
676 ASSERT(dd <= 15 && sm <= 15);
677 emitDoublePrecisionInstruction(toARMWord(cc) | VCVT_F32_F64, dd, 0, sm);