Lines Matching refs:imm16
2762 uint16_t imm16;
2764 bool expected = disassembleMoveWideImediate(address, sf, opc, hw, imm16, rd);
2786 uint16_t imm16;
2789 bool expected = disassembleMoveWideImediate(address, sf, opc, hw, imm16, rdFirst);
2791 uintptr_t result = imm16;
2793 expected = disassembleMoveWideImediate(address + 1, sf, opc, hw, imm16, rd);
2795 result |= static_cast<uintptr_t>(imm16) << 16;
2797 expected = disassembleMoveWideImediate(address + 2, sf, opc, hw, imm16, rd);
2799 result |= static_cast<uintptr_t>(imm16) << 32;
2995 uint16_t imm16;
2997 bool expected = disassembleMoveWideImediate(&insn, sf, opc, hw, imm16, rd);
3011 uint16_t imm16;
3013 bool expected = disassembleMoveWideImediate(address, sf, opc, hw, imm16, rd);
3190 static bool disassembleMoveWideImediate(void* address, Datasize& sf, MoveWideOp& opc, int& hw, uint16_t& imm16, RegisterID& rd)
3196 imm16 = insn >> 5;
3357 ALWAYS_INLINE static int excepnGeneration(ExcepnOp opc, uint16_t imm16, int LL)
3361 return (0xd4000000 | opc << 21 | imm16 << 5 | op2 << 2 | LL);
3573 ALWAYS_INLINE static int moveWideImediate(Datasize sf, MoveWideOp opc, int hw, uint16_t imm16, RegisterID rd)
3576 return (0x12800000 | sf << 31 | opc << 29 | hw << 21 | (int)imm16 << 5 | xOrZr(rd));