Lines Matching refs:ipi_ex
89 struct hv_send_ipi_ex *ipi_ex = (struct hv_send_ipi_ex *)hcall_page;
118 ipi_ex->vector = IPI_VECTOR;
119 ipi_ex->vp_set.format = HV_GENERIC_SET_SPARSE_4K;
120 ipi_ex->vp_set.valid_bank_mask = 1 << 0;
121 ipi_ex->vp_set.bank_contents[0] = BIT(RECEIVER_VCPU_ID_1);
129 hyperv_write_xmm_input(&ipi_ex->vp_set.valid_bank_mask, 1);
140 ipi_ex->vector = IPI_VECTOR;
141 ipi_ex->vp_set.format = HV_GENERIC_SET_SPARSE_4K;
142 ipi_ex->vp_set.valid_bank_mask = 1 << 1;
143 ipi_ex->vp_set.bank_contents[0] = BIT(RECEIVER_VCPU_ID_2 - 64);
151 hyperv_write_xmm_input(&ipi_ex->vp_set.valid_bank_mask, 1);
162 ipi_ex->vector = IPI_VECTOR;
163 ipi_ex->vp_set.format = HV_GENERIC_SET_SPARSE_4K;
164 ipi_ex->vp_set.valid_bank_mask = 1 << 1 | 1;
165 ipi_ex->vp_set.bank_contents[0] = BIT(RECEIVER_VCPU_ID_1);
166 ipi_ex->vp_set.bank_contents[1] = BIT(RECEIVER_VCPU_ID_2 - 64);
174 hyperv_write_xmm_input(&ipi_ex->vp_set.valid_bank_mask, 2);
185 ipi_ex->vector = IPI_VECTOR;
186 ipi_ex->vp_set.format = HV_GENERIC_SET_ALL;
195 ipi_ex->vp_set.valid_bank_mask = 0;
196 hyperv_write_xmm_input(&ipi_ex->vp_set.valid_bank_mask, 2);