soc/ux500/ux500_msp_i2s.c

138 	writel(temp_reg, msp->registers + MSP_TCF);
166 	writel(temp_reg, msp->registers + MSP_RCF);
203 	temp_reg = readl(msp->registers + MSP_GCR) & ~TX_CLK_POL_RISING;
205 	writel(temp_reg, msp->registers + MSP_GCR);
206 	temp_reg = readl(msp->registers + MSP_GCR) & ~RX_CLK_POL_RISING;
208 	writel(temp_reg, msp->registers + MSP_GCR);
222 	reg_val_GCR = readl(msp->registers + MSP_GCR);
223 	writel(reg_val_GCR & ~SRG_ENABLE, msp->registers + MSP_GCR);
255 	writel(temp_reg, msp->registers + MSP_SRG);
261 	reg_val_GCR = readl(msp->registers + MSP_GCR);
262 	writel(reg_val_GCR | SRG_ENABLE, msp->registers + MSP_GCR);
291 			reg_val_MCR = readl(msp->registers + MSP_MCR);
294 				msp->registers + MSP_MCR);
296 				msp->registers + MSP_TCE0);
298 				msp->registers + MSP_TCE1);
300 				msp->registers + MSP_TCE2);
302 				msp->registers + MSP_TCE3);
312 			reg_val_MCR = readl(msp->registers + MSP_MCR);
315 				msp->registers + MSP_MCR);
317 					msp->registers + MSP_RCE0);
319 					msp->registers + MSP_RCE1);
321 					msp->registers + MSP_RCE2);
323 					msp->registers + MSP_RCE3);
331 			reg_val_MCR = readl(msp->registers + MSP_MCR);
334 				msp->registers + MSP_MCR);
337 					msp->registers + MSP_RCM);
339 					msp->registers + MSP_RCV);
363 	reg_val_DMACR = readl(msp->registers + MSP_DMACR);
368 	writel(reg_val_DMACR, msp->registers + MSP_DMACR);
370 	writel(config->iodelay, msp->registers + MSP_IODLY);
373 	reg_val_GCR = readl(msp->registers + MSP_GCR);
374 	writel(reg_val_GCR | FRAME_GEN_ENABLE, msp->registers + MSP_GCR);
384 	reg_val_GCR = readl(msp->registers + MSP_GCR);
385 	writel(reg_val_GCR | RX_ENABLE, msp->registers + MSP_GCR);
387 	reg_val_FLR = readl(msp->registers + MSP_FLR);
389 		readl(msp->registers + MSP_DR);
390 		reg_val_FLR = readl(msp->registers + MSP_FLR);
393 	writel(reg_val_GCR, msp->registers + MSP_GCR);
401 	reg_val_GCR = readl(msp->registers + MSP_GCR);
402 	writel(reg_val_GCR | TX_ENABLE, msp->registers + MSP_GCR);
403 	writel(MSP_ITCR_ITEN | MSP_ITCR_TESTFIFO, msp->registers + MSP_ITCR);
405 	reg_val_FLR = readl(msp->registers + MSP_FLR);
407 		readl(msp->registers + MSP_TSTDR);
408 		reg_val_FLR = readl(msp->registers + MSP_FLR);
410 	writel(0x0, msp->registers + MSP_ITCR);
411 	writel(reg_val_GCR, msp->registers + MSP_GCR);
462 	old_reg = readl(msp->registers + MSP_GCR);
465 	writel(new_reg, msp->registers + MSP_GCR);
488 	reg_val_GCR = readl(msp->registers + MSP_GCR);
489 	writel(reg_val_GCR & ~RX_ENABLE, msp->registers + MSP_GCR);
490 	reg_val_DMACR = readl(msp->registers + MSP_DMACR);
491 	writel(reg_val_DMACR & ~RX_DMA_ENABLE, msp->registers + MSP_DMACR);
492 	reg_val_IMSC = readl(msp->registers + MSP_IMSC);
495 			msp->registers + MSP_IMSC);
504 	reg_val_GCR = readl(msp->registers + MSP_GCR);
505 	writel(reg_val_GCR & ~TX_ENABLE, msp->registers + MSP_GCR);
506 	reg_val_DMACR = readl(msp->registers + MSP_DMACR);
507 	writel(reg_val_DMACR & ~TX_DMA_ENABLE, msp->registers + MSP_DMACR);
508 	reg_val_IMSC = readl(msp->registers + MSP_IMSC);
511 			msp->registers + MSP_IMSC);
521 	reg_val_GCR = readl(msp->registers + MSP_GCR);
525 		reg_val_GCR = readl(msp->registers + MSP_GCR);
527 				msp->registers + MSP_GCR);
533 		writel((readl(msp->registers + MSP_GCR) &
534 			       (~TX_ENABLE)), msp->registers + MSP_GCR);
540 		writel((readl(msp->registers + MSP_GCR) &
542 				msp->registers + MSP_GCR);
572 		reg_val_GCR = readl(msp->registers + MSP_GCR);
573 		writel(reg_val_GCR | enable_bit, msp->registers + MSP_GCR);
601 		writel((readl(msp->registers + MSP_GCR) &
603 			      msp->registers + MSP_GCR);
605 		writel(0, msp->registers + MSP_GCR);
606 		writel(0, msp->registers + MSP_TCF);
607 		writel(0, msp->registers + MSP_RCF);
608 		writel(0, msp->registers + MSP_DMACR);
609 		writel(0, msp->registers + MSP_SRG);
610 		writel(0, msp->registers + MSP_MCR);
611 		writel(0, msp->registers + MSP_RCM);
612 		writel(0, msp->registers + MSP_RCV);
613 		writel(0, msp->registers + MSP_TCE0);
614 		writel(0, msp->registers + MSP_TCE1);
615 		writel(0, msp->registers + MSP_TCE2);
616 		writel(0, msp->registers + MSP_TCE3);
617 		writel(0, msp->registers + MSP_RCE0);
618 		writel(0, msp->registers + MSP_RCE1);
619 		writel(0, msp->registers + MSP_RCE2);
620 		writel(0, msp->registers + MSP_RCE3);
648 	msp->registers = devm_ioremap(&pdev->dev, res->start,
650 	if (msp->registers == NULL) {