soc/tegra/tegra20_ac97.c

32 #define DRV_NAME "tegra20-ac97"
36 static void tegra20_ac97_codec_reset(struct snd_ac97 *ac97)
62 static void tegra20_ac97_codec_warm_reset(struct snd_ac97 *ac97)
141 static inline void tegra20_ac97_start_playback(struct tegra20_ac97 *ac97)
143 	regmap_update_bits(ac97->regmap, TEGRA20_AC97_FIFO1_SCR,
147 	regmap_update_bits(ac97->regmap, TEGRA20_AC97_CTRL,
154 static inline void tegra20_ac97_stop_playback(struct tegra20_ac97 *ac97)
156 	regmap_update_bits(ac97->regmap, TEGRA20_AC97_FIFO1_SCR,
159 	regmap_update_bits(ac97->regmap, TEGRA20_AC97_CTRL,
163 static inline void tegra20_ac97_start_capture(struct tegra20_ac97 *ac97)
165 	regmap_update_bits(ac97->regmap, TEGRA20_AC97_FIFO1_SCR,
170 static inline void tegra20_ac97_stop_capture(struct tegra20_ac97 *ac97)
172 	regmap_update_bits(ac97->regmap, TEGRA20_AC97_FIFO1_SCR,
179 	struct tegra20_ac97 *ac97 = snd_soc_dai_get_drvdata(dai);
186 			tegra20_ac97_start_playback(ac97);
188 			tegra20_ac97_start_capture(ac97);
194 			tegra20_ac97_stop_playback(ac97);
196 			tegra20_ac97_stop_capture(ac97);
207 	struct tegra20_ac97 *ac97 = snd_soc_dai_get_drvdata(dai);
209 	snd_soc_dai_init_dma_data(dai,	&ac97->playback_dma_data,
210 					&ac97->capture_dma_data);
221 	.name = "tegra-ac97-pcm",
303 	struct tegra20_ac97 *ac97;
308 	ac97 = devm_kzalloc(&pdev->dev, sizeof(struct tegra20_ac97),
310 	if (!ac97) {
314 	dev_set_drvdata(&pdev->dev, ac97);
316 	ac97->reset = devm_reset_control_get_exclusive(&pdev->dev, "ac97");
317 	if (IS_ERR(ac97->reset)) {
318 		dev_err(&pdev->dev, "Can't retrieve ac97 reset\n");
319 		ret = PTR_ERR(ac97->reset);
323 	ac97->clk_ac97 = devm_clk_get(&pdev->dev, NULL);
324 	if (IS_ERR(ac97->clk_ac97)) {
325 		dev_err(&pdev->dev, "Can't retrieve ac97 clock\n");
326 		ret = PTR_ERR(ac97->clk_ac97);
336 	ac97->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
338 	if (IS_ERR(ac97->regmap)) {
340 		ret = PTR_ERR(ac97->regmap);
345 	ac97->reset_gpio = devm_gpiod_get(&pdev->dev,
348 	if (IS_ERR(ac97->reset_gpio)) {
349 		ret = PTR_ERR(ac97->reset_gpio);
353 	gpiod_set_consumer_name(ac97->reset_gpio, "codec-reset");
355 	ac97->sync_gpio = devm_gpiod_get(&pdev->dev,
358 	if (IS_ERR(ac97->sync_gpio)) {
359 		ret = PTR_ERR(ac97->sync_gpio);
363 	gpiod_set_consumer_name(ac97->sync_gpio, "codec-sync");
365 	ac97->capture_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_RX1;
366 	ac97->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
367 	ac97->capture_dma_data.maxburst = 4;
369 	ac97->playback_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_TX1;
370 	ac97->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
371 	ac97->playback_dma_data.maxburst = 4;
373 	ret = reset_control_assert(ac97->reset);
379 	ret = clk_prepare_enable(ac97->clk_ac97);
387 	ret = reset_control_deassert(ac97->reset);
414 	workdata = ac97;
421 	clk_disable_unprepare(ac97->clk_ac97);
430 	struct tegra20_ac97 *ac97 = dev_get_drvdata(&pdev->dev);
435 	clk_disable_unprepare(ac97->clk_ac97);
441 	{ .compatible = "nvidia,tegra20-ac97", },