soc/qcom/lpass-hdmi.c

22 	struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
34 	struct lpass_dp_metadata_ctl *meta_ctl = drvdata->meta_ctl;
35 	struct lpass_sstream_ctl *sstream_ctl = drvdata->sstream_ctl;
77 	ret = regmap_field_write(drvdata->tx_ctl->soft_reset, LPASS_TX_CTL_RESET);
81 	ret = regmap_field_write(drvdata->tx_ctl->soft_reset, LPASS_TX_CTL_CLEAR);
85 	ret = regmap_field_write(drvdata->hdmitx_legacy_en, LPASS_HDMITX_LEGACY_DISABLE);
89 	ret = regmap_field_write(drvdata->hdmitx_parity_calc_en, HDMITX_PARITY_CALC_EN);
93 	ret = regmap_field_write(drvdata->vbit_ctl->replace_vbit, REPLACE_VBIT);
97 	ret = regmap_field_write(drvdata->vbit_ctl->vbit_stream, LINEAR_PCM_DATA);
101 	ret = regmap_field_write(drvdata->hdmitx_ch_msb[0], ch_sts_buf1);
105 	ret = regmap_field_write(drvdata->hdmitx_ch_lsb[0], ch_sts_buf0);
109 	ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->use_hw_chs, HW_MODE);
113 	ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->hw_chs_sel, SW_MODE);
117 	ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->use_hw_usr, HW_MODE);
121 	ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->hw_usr_sel, SW_MODE);
194 	struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
196 	ret = regmap_field_write(drvdata->sstream_ctl->sstream_en, LPASS_SSTREAM_ENABLE);
200 	ret = regmap_field_write(drvdata->meta_ctl->mute, LPASS_MUTE_DISABLE);
208 	struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
209 	struct lpass_dp_metadata_ctl *meta_ctl = drvdata->meta_ctl;
210 	struct lpass_sstream_ctl *sstream_ctl = drvdata->sstream_ctl;