Lines Matching refs:afe

3  * mt2701-afe-clock-ctrl.c  --  Mediatek 2701 afe clock ctrl
10 #include "mt2701-afe-common.h"
11 #include "mt2701-afe-clock-ctrl.h"
25 int mt2701_init_clock(struct mtk_base_afe *afe)
27 struct mt2701_afe_private *afe_priv = afe->platform_priv;
31 afe_priv->base_ck[i] = devm_clk_get(afe->dev, base_clks[i]);
33 dev_err(afe->dev, "failed to get %s\n", base_clks[i]);
45 i2s_path->sel_ck = devm_clk_get(afe->dev, name);
47 dev_err(afe->dev, "failed to get %s\n", name);
52 i2s_path->div_ck = devm_clk_get(afe->dev, name);
54 dev_err(afe->dev, "failed to get %s\n", name);
59 i2s_path->mclk_ck = devm_clk_get(afe->dev, name);
61 dev_err(afe->dev, "failed to get %s\n", name);
66 i2s_ck = devm_clk_get(afe->dev, name);
68 dev_err(afe->dev, "failed to get %s\n", name);
74 i2s_ck = devm_clk_get(afe->dev, name);
76 dev_err(afe->dev, "failed to get %s\n", name);
82 i2s_path->asrco_ck = devm_clk_get(afe->dev, name);
84 dev_err(afe->dev, "failed to get %s\n", name);
90 afe_priv->mrgif_ck = devm_clk_get(afe->dev, "audio_mrgif_pd");
101 int mt2701_afe_enable_i2s(struct mtk_base_afe *afe,
109 dev_err(afe->dev, "failed to enable ASRC clock %d\n", ret);
115 dev_err(afe->dev, "failed to enable I2S clock %d\n", ret);
127 void mt2701_afe_disable_i2s(struct mtk_base_afe *afe,
135 int mt2701_afe_enable_mclk(struct mtk_base_afe *afe, int id)
137 struct mt2701_afe_private *afe_priv = afe->platform_priv;
143 void mt2701_afe_disable_mclk(struct mtk_base_afe *afe, int id)
145 struct mt2701_afe_private *afe_priv = afe->platform_priv;
151 int mt2701_enable_btmrg_clk(struct mtk_base_afe *afe)
153 struct mt2701_afe_private *afe_priv = afe->platform_priv;
158 void mt2701_disable_btmrg_clk(struct mtk_base_afe *afe)
160 struct mt2701_afe_private *afe_priv = afe->platform_priv;
165 static int mt2701_afe_enable_audsys(struct mtk_base_afe *afe)
167 struct mt2701_afe_private *afe_priv = afe->platform_priv;
220 static void mt2701_afe_disable_audsys(struct mtk_base_afe *afe)
222 struct mt2701_afe_private *afe_priv = afe->platform_priv;
233 int mt2701_afe_enable_clock(struct mtk_base_afe *afe)
238 ret = mt2701_afe_enable_audsys(afe);
240 dev_err(afe->dev, "failed to enable audio system %d\n", ret);
244 regmap_update_bits(afe->regmap, ASYS_TOP_CON,
247 regmap_update_bits(afe->regmap, AFE_DAC_CON0,
252 regmap_write(afe->regmap, PWR1_ASM_CON1, PWR1_ASM_CON1_INIT_VAL);
253 regmap_write(afe->regmap, PWR2_ASM_CON1, PWR2_ASM_CON1_INIT_VAL);
258 int mt2701_afe_disable_clock(struct mtk_base_afe *afe)
260 regmap_update_bits(afe->regmap, ASYS_TOP_CON,
262 regmap_update_bits(afe->regmap, AFE_DAC_CON0,
265 mt2701_afe_disable_audsys(afe);
270 int mt2701_mclk_configuration(struct mtk_base_afe *afe, int id)
273 struct mt2701_afe_private *priv = afe->platform_priv;
286 dev_err(afe->dev, "failed to set mclk source\n");
293 dev_err(afe->dev, "failed to set mclk divider %d\n", ret);