mediatek/common/mtk-afe-fe-dai.c

44 	struct mtk_base_afe_memif *memif = &afe->memif[memif_num];
48 	memif->substream = substream;
53 	mtk_regmap_update_bits(afe->regmap, memif->data->agent_disable_reg,
54 			       1, 0, memif->data->agent_disable_shift);
81 	/* dynamic allocate irq to memif */
82 	if (memif->irq_usage < 0) {
87 			memif->irq_usage = irq_id;
103 	struct mtk_base_afe_memif *memif = &afe->memif[snd_soc_rtd_to_cpu(rtd, 0)->id];
106 	irq_id = memif->irq_usage;
108 	mtk_regmap_update_bits(afe->regmap, memif->data->agent_disable_reg,
109 			       1, 1, memif->data->agent_disable_shift);
111 	if (!memif->const_irq) {
113 		memif->irq_usage = -1;
114 		memif->substream = NULL;
126 	struct mtk_base_afe_memif *memif = &afe->memif[id];
136 		__func__, memif->data->name,
203 	struct mtk_base_afe_memif *memif = &afe->memif[id];
204 	struct mtk_base_afe_irq *irqs = &afe->irqs[memif->irq_usage];
210 	dev_dbg(afe->dev, "%s %s cmd=%d\n", __func__, memif->data->name, cmd);
217 			dev_err(afe->dev, "%s(), error, id %d, memif enable, ret %d\n",
246 			dev_err(afe->dev, "%s(), error, id %d, memif enable, ret %d\n",
375 	struct mtk_base_afe_memif *memif = &afe->memif[id];
377 	if (memif->data->enable_shift < 0) {
382 	return mtk_regmap_update_bits(afe->regmap, memif->data->enable_reg,
383 				      1, 1, memif->data->enable_shift);
389 	struct mtk_base_afe_memif *memif = &afe->memif[id];
391 	if (memif->data->enable_shift < 0) {
396 	return mtk_regmap_update_bits(afe->regmap, memif->data->enable_reg,
397 				      1, 0, memif->data->enable_shift);
406 	struct mtk_base_afe_memif *memif = &afe->memif[id];
411 	memif->dma_area = dma_area;
412 	memif->dma_addr = dma_addr;
413 	memif->dma_bytes = dma_bytes;
416 	mtk_regmap_write(afe->regmap, memif->data->reg_ofs_base,
419 	if (memif->data->reg_ofs_end)
421 				 memif->data->reg_ofs_end,
425 				 memif->data->reg_ofs_base +
430 	if (memif->data->reg_ofs_base_msb) {
431 		mtk_regmap_write(afe->regmap, memif->data->reg_ofs_base_msb,
434 				 memif->data->reg_ofs_end_msb,
439 	 * set MSB to 33-bit, for memif address
440 	 * only for memif base address, if msb_end_reg exists
442 	if (memif->data->msb_reg)
443 		mtk_regmap_update_bits(afe->regmap, memif->data->msb_reg,
444 				       1, msb_at_bit33, memif->data->msb_shift);
446 	/* set MSB to 33-bit, for memif end address */
447 	if (memif->data->msb_end_reg)
448 		mtk_regmap_update_bits(afe->regmap, memif->data->msb_end_reg,
450 				       memif->data->msb_end_shift);
459 	struct mtk_base_afe_memif *memif = &afe->memif[id];
462 	if (memif->data->mono_shift < 0)
465 	if (memif->data->quad_ch_mask) {
468 		mtk_regmap_update_bits(afe->regmap, memif->data->quad_ch_reg,
469 				       memif->data->quad_ch_mask,
470 				       quad_ch, memif->data->quad_ch_shift);
473 	if (memif->data->mono_invert)
478 	/* for specific configuration of memif mono mode */
479 	if (memif->data->int_odd_flag_reg)
481 				       memif->data->int_odd_flag_reg,
483 				       memif->data->int_odd_flag_shift);
485 	return mtk_regmap_update_bits(afe->regmap, memif->data->mono_reg,
486 				      1, mono, memif->data->mono_shift);
493 	struct mtk_base_afe_memif *memif = &afe->memif[id];
495 	if (memif->data->fs_shift >= 0)
496 		mtk_regmap_update_bits(afe->regmap, memif->data->fs_reg,
497 				       memif->data->fs_maskbit,
498 				       fs, memif->data->fs_shift);
551 	struct mtk_base_afe_memif *memif = &afe->memif[id];
581 	mtk_regmap_update_bits(afe->regmap, memif->data->hd_reg,
582 			       0x3, hd_audio, memif->data->hd_shift);
584 	mtk_regmap_update_bits(afe->regmap, memif->data->hd_align_reg,
585 			       0x1, hd_align, memif->data->hd_align_mshift);
594 	const struct mtk_base_memif_data *memif_data = afe->memif[id].data;