intel/avs/cldma.c

60 void hda_cldma_fill(struct hda_cldma *cl)
64 	if (cl->remaining > cl->buffer_size)
65 		size = cl->buffer_size;
67 		size = cl->remaining;
69 	offset = snd_hdac_stream_readl(cl, CL_SD_SPIB);
70 	if (offset + size > cl->buffer_size) {
73 		ss = cl->buffer_size - offset;
74 		memcpy(cl->dmab_data.area + offset, cl->position, ss);
77 		cl->position += ss;
78 		cl->remaining -= ss;
81 	memcpy(cl->dmab_data.area + offset, cl->position, size);
82 	cl->position += size;
83 	cl->remaining -= size;
85 	snd_hdac_stream_writel(cl, CL_SD_SPIB, offset + size);
90 	struct hda_cldma *cl = container_of(work, struct hda_cldma, memcpy_work.work);
93 	ret = hda_cldma_start(cl);
95 		dev_err(cl->dev, "cldma set RUN failed: %d\n", ret);
100 		ret = wait_for_completion_timeout(&cl->completion,
103 			dev_err(cl->dev, "cldma IOC timeout\n");
107 		if (!(cl->sd_status & SD_INT_COMPLETE)) {
108 			dev_err(cl->dev, "cldma transfer error, SD status: 0x%08x\n",
109 				cl->sd_status);
113 		if (!cl->remaining)
116 		reinit_completion(&cl->completion);
117 		hda_cldma_fill(cl);
119 		snd_hdac_adsp_updatel(cl, AVS_ADSP_REG_ADSPIC, AVS_ADSP_ADSPIC_CLDMA,
124 void hda_cldma_transfer(struct hda_cldma *cl, unsigned long start_delay)
126 	if (!cl->remaining)
129 	reinit_completion(&cl->completion);
131 	hda_cldma_fill(cl);
133 	schedule_delayed_work(&cl->memcpy_work, start_delay);
136 int hda_cldma_start(struct hda_cldma *cl)
141 	snd_hdac_adsp_updatel(cl, AVS_ADSP_REG_ADSPIC, AVS_ADSP_ADSPIC_CLDMA,
143 	snd_hdac_stream_updateb(cl, SD_CTL, SD_INT_MASK | SD_CTL_DMA_START,
147 	return snd_hdac_stream_readb_poll(cl, SD_CTL, reg, reg & SD_CTL_DMA_START,
151 int hda_cldma_stop(struct hda_cldma *cl)
157 	snd_hdac_adsp_updatel(cl, AVS_ADSP_REG_ADSPIC, AVS_ADSP_ADSPIC_CLDMA, 0);
158 	snd_hdac_stream_updateb(cl, SD_CTL, SD_INT_MASK | SD_CTL_DMA_START, 0);
161 	ret = snd_hdac_stream_readb_poll(cl, SD_CTL, reg, !(reg & SD_CTL_DMA_START),
163 	cancel_delayed_work_sync(&cl->memcpy_work);
168 int hda_cldma_reset(struct hda_cldma *cl)
173 	ret = hda_cldma_stop(cl);
175 		dev_err(cl->dev, "cldma stop failed: %d\n", ret);
179 	snd_hdac_stream_updateb(cl, SD_CTL, SD_CTL_STREAM_RESET, SD_CTL_STREAM_RESET);
180 	ret = snd_hdac_stream_readb_poll(cl, SD_CTL, reg, (reg & SD_CTL_STREAM_RESET),
183 		dev_err(cl->dev, "cldma set SRST failed: %d\n", ret);
187 	snd_hdac_stream_updateb(cl, SD_CTL, SD_CTL_STREAM_RESET, 0);
188 	ret = snd_hdac_stream_readb_poll(cl, SD_CTL, reg, !(reg & SD_CTL_STREAM_RESET),
191 		dev_err(cl->dev, "cldma unset SRST failed: %d\n", ret);
198 void hda_cldma_set_data(struct hda_cldma *cl, void *data, unsigned int size)
201 	cl->position = data;
202 	cl->remaining = size;
205 static void cldma_setup_bdle(struct hda_cldma *cl, u32 bdle_size)
207 	struct snd_dma_buffer *dmab = &cl->dmab_data;
208 	__le32 *bdl = (__le32 *)cl->dmab_bdl.area;
209 	int remaining = cl->buffer_size;
212 	cl->num_periods = 0;
230 		cl->num_periods++;
234 void hda_cldma_setup(struct hda_cldma *cl)
236 	dma_addr_t bdl_addr = cl->dmab_bdl.addr;
238 	cldma_setup_bdle(cl, cl->buffer_size / 2);
240 	snd_hdac_stream_writel(cl, SD_BDLPL, AZX_SD_BDLPL_BDLPLBA(lower_32_bits(bdl_addr)));
241 	snd_hdac_stream_writel(cl, SD_BDLPU, upper_32_bits(bdl_addr));
243 	snd_hdac_stream_writel(cl, SD_CBL, cl->buffer_size);
244 	snd_hdac_stream_writeb(cl, SD_LVI, cl->num_periods - 1);
246 	snd_hdac_stream_updatel(cl, SD_CTL, AZX_SD_CTL_STRM_MASK, AZX_SD_CTL_STRM(cl));
248 	snd_hdac_stream_writel(cl, CL_SPBFCTL, 1);
253 	struct hda_cldma *cl = dev_id;
256 	adspis = snd_hdac_adsp_readl(cl, AVS_ADSP_REG_ADSPIS);
262 	cl->sd_status = snd_hdac_stream_readb(cl, SD_STS);
263 	dev_warn(cl->dev, "%s sd_status: 0x%08x\n", __func__, cl->sd_status);
266 	snd_hdac_adsp_updatel(cl, AVS_ADSP_REG_ADSPIC, AVS_ADSP_ADSPIC_CLDMA, 0);
268 	complete(&cl->completion);
273 int hda_cldma_init(struct hda_cldma *cl, struct hdac_bus *bus, void __iomem *dsp_ba,
279 	ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV_SG, bus->dev, buffer_size, &cl->dmab_data);
283 	ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, bus->dev, BDL_SIZE, &cl->dmab_bdl);
287 	cl->dev = bus->dev;
288 	cl->bus = bus;
289 	cl->dsp_ba = dsp_ba;
290 	cl->buffer_size = buffer_size;
291 	cl->sd_addr = dsp_ba + AZX_CL_SD_BASE;
293 	ret = pci_request_irq(pci, 0, cldma_irq_handler, NULL, cl, "CLDMA");
295 		dev_err(cl->dev, "Failed to request CLDMA IRQ handler: %d\n", ret);
302 	snd_dma_free_pages(&cl->dmab_bdl);
304 	snd_dma_free_pages(&cl->dmab_data);
309 void hda_cldma_free(struct hda_cldma *cl)
311 	struct pci_dev *pci = to_pci_dev(cl->dev);
313 	pci_free_irq(pci, 0, cl);
314 	snd_dma_free_pages(&cl->dmab_data);
315 	snd_dma_free_pages(&cl->dmab_bdl);