soc/fsl/mpc5200_psc_ac97.c

27 static struct psc_dma *psc_dma;
34 	mutex_lock(&psc_dma->mutex);
37 	status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
41 		mutex_unlock(&psc_dma->mutex);
46 	in_be32(&psc_dma->psc_regs->ac97_data);
49 	out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
52 	status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) &
56 				in_be16(&psc_dma->psc_regs->sr_csr.status));
57 		mutex_unlock(&psc_dma->mutex);
61 	val = in_be32(&psc_dma->psc_regs->ac97_data);
64 		mutex_unlock(&psc_dma->mutex);
69 	mutex_unlock(&psc_dma->mutex);
78 	mutex_lock(&psc_dma->mutex);
81 	status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
88 	out_be32(&psc_dma->psc_regs->ac97_cmd,
92 	mutex_unlock(&psc_dma->mutex);
97 	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
99 	mutex_lock(&psc_dma->mutex);
101 	out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
103 	out_be32(&regs->sicr, psc_dma->sicr);
105 	mutex_unlock(&psc_dma->mutex);
110 	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
112 	mutex_lock(&psc_dma->mutex);
113 	dev_dbg(psc_dma->dev, "cold reset\n");
115 	mpc5200_psc_ac97_gpio_reset(psc_dma->id);
118 	out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB);
123 	mutex_unlock(&psc_dma->mutex);
140 	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
141 	struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
143 	dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i"
163 	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
165 	dev_dbg(psc_dma->dev, "%s(substream=%p)\n", __func__, substream);
168 		out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000);
170 		out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000);
178 	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(dai);
179 	struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
183 		dev_dbg(psc_dma->dev, "AC97 START: stream=%i\n",
187 		psc_dma->slots |= s->ac97_slot_bits;
188 		out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
192 		dev_dbg(psc_dma->dev, "AC97 STOP: stream=%i\n",
196 		psc_dma->slots &= ~(s->ac97_slot_bits);
197 		out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
205 	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
206 	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
297 	psc_dma = dev_get_drvdata(&op->dev);
298 	regs = psc_dma->psc_regs;
300 	psc_dma->imr = 0;
301 	out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
304 	psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97;
305 	out_be32(&regs->sicr, psc_dma->sicr);