Lines Matching refs:micfil
100 { .compatible = "fsl,imx8mm-micfil", .data = &fsl_micfil_imx8mm },
101 { .compatible = "fsl,imx8mp-micfil", .data = &fsl_micfil_imx8mp },
102 { .compatible = "fsl,imx93-micfil", .data = &fsl_micfil_imx93 },
122 static int micfil_set_quality(struct fsl_micfil *micfil)
126 switch (micfil->quality) {
147 return regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2,
156 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(cmpnt);
158 ucontrol->value.integer.value[0] = micfil->quality;
167 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(cmpnt);
169 micfil->quality = ucontrol->value.integer.value[0];
171 return micfil_set_quality(micfil);
221 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp);
230 micfil->dc_remover = val;
249 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp);
251 ucontrol->value.enumerated.item[0] = micfil->dc_remover;
262 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp);
265 micfil->vad_enabled = val;
274 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp);
276 ucontrol->value.enumerated.item[0] = micfil->vad_enabled;
287 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp);
293 micfil->vad_init_mode = val;
302 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp);
304 ucontrol->value.enumerated.item[0] = micfil->vad_init_mode;
313 struct fsl_micfil *micfil = snd_soc_component_get_drvdata(comp);
315 ucontrol->value.enumerated.item[0] = micfil->vad_detected;
365 struct fsl_micfil *micfil = dev_get_drvdata(dev);
369 if (!micfil->soc->use_verid)
372 ret = regmap_read(micfil->regmap, REG_MICFIL_VERID, &val);
378 micfil->verid.version = val &
380 micfil->verid.version >>= MICFIL_VERID_MINOR_SHIFT;
381 micfil->verid.feature = val & MICFIL_VERID_FEATURE_MASK;
383 ret = regmap_read(micfil->regmap, REG_MICFIL_PARAM, &val);
389 micfil->param.hwvad_num = (val & MICFIL_PARAM_NUM_HWVAD_MASK) >>
391 micfil->param.hwvad_zcd = val & MICFIL_PARAM_HWVAD_ZCD;
392 micfil->param.hwvad_energy_mode = val & MICFIL_PARAM_HWVAD_ENERGY_MODE;
393 micfil->param.hwvad = val & MICFIL_PARAM_HWVAD;
394 micfil->param.dc_out_bypass = val & MICFIL_PARAM_DC_OUT_BYPASS;
395 micfil->param.dc_in_bypass = val & MICFIL_PARAM_DC_IN_BYPASS;
396 micfil->param.low_power = val & MICFIL_PARAM_LOW_POWER;
397 micfil->param.fil_out_width = val & MICFIL_PARAM_FIL_OUT_WIDTH;
398 micfil->param.fifo_ptrwid = (val & MICFIL_PARAM_FIFO_PTRWID_MASK) >>
400 micfil->param.npair = (val & MICFIL_PARAM_NPAIR_MASK) >>
413 struct fsl_micfil *micfil = dev_get_drvdata(dev);
416 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1,
421 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1,
432 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1,
441 ret = regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, 0xFF, 0xFF);
451 struct fsl_micfil *micfil = snd_soc_dai_get_drvdata(dai);
453 if (!micfil) {
454 dev_err(dai->dev, "micfil dai priv_data not set\n");
462 static int fsl_micfil_configure_hwvad_interrupts(struct fsl_micfil *micfil, int enable)
468 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1,
472 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1,
479 static int fsl_micfil_init_hwvad_energy_mode(struct fsl_micfil *micfil)
482 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2,
486 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2,
490 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG,
494 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG,
498 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG,
502 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG,
506 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG,
510 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG,
517 static int fsl_micfil_init_hwvad_envelope_mode(struct fsl_micfil *micfil)
520 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2,
524 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2,
528 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG,
532 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG,
536 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG,
540 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG,
544 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG,
548 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG,
567 static int fsl_micfil_hwvad_enable(struct fsl_micfil *micfil)
571 micfil->vad_detected = 0;
574 if (micfil->vad_init_mode == MICFIL_HWVAD_ENVELOPE_MODE)
575 ret = fsl_micfil_init_hwvad_envelope_mode(micfil);
577 ret = fsl_micfil_init_hwvad_energy_mode(micfil);
582 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1,
586 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1,
590 ret = fsl_micfil_configure_hwvad_interrupts(micfil, 1);
595 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1,
599 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1,
605 static int fsl_micfil_hwvad_disable(struct fsl_micfil *micfil)
607 struct device *dev = &micfil->pdev->dev;
611 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1,
615 ret = fsl_micfil_configure_hwvad_interrupts(micfil, 0);
625 struct fsl_micfil *micfil = snd_soc_dai_get_drvdata(dai);
626 struct device *dev = &micfil->pdev->dev;
645 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1,
652 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1,
657 if (micfil->vad_enabled)
658 fsl_micfil_hwvad_enable(micfil);
664 if (micfil->vad_enabled)
665 fsl_micfil_hwvad_disable(micfil);
668 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1,
673 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1,
685 static int fsl_micfil_reparent_rootclk(struct fsl_micfil *micfil, unsigned int sample_rate)
687 struct device *dev = &micfil->pdev->dev;
693 clk = micfil->mclk;
697 fsl_asoc_reparent_pll_clocks(dev, clk, micfil->pll8k_clk,
698 micfil->pll11k_clk, ratio);
710 struct fsl_micfil *micfil = snd_soc_dai_get_drvdata(dai);
718 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1,
724 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1,
729 ret = fsl_micfil_reparent_rootclk(micfil, rate);
733 ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8);
737 ret = micfil_set_quality(micfil);
741 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2,
747 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1,
752 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1,
756 micfil->dma_params_rx.peripheral_config = &micfil->sdmacfg;
757 micfil->dma_params_rx.peripheral_size = sizeof(micfil->sdmacfg);
758 micfil->sdmacfg.n_fifos_src = channels;
759 micfil->sdmacfg.sw_done = true;
760 micfil->dma_params_rx.maxburst = channels * MICFIL_DMA_MAXBURST_RX;
761 if (micfil->soc->use_edma)
762 micfil->dma_params_rx.maxburst = channels;
769 struct fsl_micfil *micfil = dev_get_drvdata(cpu_dai->dev);
774 micfil->quality = QUALITY_VLOW0;
775 micfil->card = cpu_dai->component->card;
778 regmap_write(micfil->regmap, REG_MICFIL_OUT_CTRL, 0x22222222);
783 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_DC_CTRL,
789 micfil->dc_remover = MICFIL_DC_BYPASS;
792 &micfil->dma_params_rx);
795 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_FIFO_CTRL,
797 FIELD_PREP(MICFIL_FIFO_CTRL_FIFOWMK, micfil->soc->fifo_depth - 1));
823 .name = "fsl-micfil-dai",
955 struct fsl_micfil *micfil = (struct fsl_micfil *)devid;
956 struct platform_device *pdev = micfil->pdev;
963 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg);
964 regmap_read(micfil->regmap, REG_MICFIL_CTRL1, &ctrl1_reg);
965 regmap_read(micfil->regmap, REG_MICFIL_FIFO_STAT, &fifo_stat_reg);
978 regmap_write_bits(micfil->regmap,
1001 struct fsl_micfil *micfil = (struct fsl_micfil *)devid;
1002 struct platform_device *pdev = micfil->pdev;
1005 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg);
1015 regmap_write_bits(micfil->regmap, REG_MICFIL_STAT,
1024 struct fsl_micfil *micfil = (struct fsl_micfil *)devid;
1027 if (!micfil->card)
1030 kctl = snd_soc_card_get_kcontrol(micfil->card, "VAD Detected");
1034 if (micfil->vad_detected)
1035 snd_ctl_notify(micfil->card->snd_card,
1044 struct fsl_micfil *micfil = (struct fsl_micfil *)devid;
1045 struct device *dev = &micfil->pdev->dev;
1049 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg);
1059 regmap_write_bits(micfil->regmap, REG_MICFIL_VAD0_STAT,
1063 micfil->vad_detected = 1;
1066 ret = fsl_micfil_hwvad_disable(micfil);
1075 struct fsl_micfil *micfil = (struct fsl_micfil *)devid;
1076 struct device *dev = &micfil->pdev->dev;
1079 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg);
1093 struct fsl_micfil *micfil;
1098 micfil = devm_kzalloc(&pdev->dev, sizeof(*micfil), GFP_KERNEL);
1099 if (!micfil)
1102 micfil->pdev = pdev;
1103 strscpy(micfil->name, np->name, sizeof(micfil->name));
1105 micfil->soc = of_device_get_match_data(&pdev->dev);
1110 micfil->mclk = devm_clk_get(&pdev->dev, "ipg_clk_app");
1111 if (IS_ERR(micfil->mclk)) {
1113 PTR_ERR(micfil->mclk));
1114 return PTR_ERR(micfil->mclk);
1117 micfil->busclk = devm_clk_get(&pdev->dev, "ipg_clk");
1118 if (IS_ERR(micfil->busclk)) {
1120 PTR_ERR(micfil->busclk));
1121 return PTR_ERR(micfil->busclk);
1124 fsl_asoc_get_pll_clocks(&pdev->dev, &micfil->pll8k_clk,
1125 &micfil->pll11k_clk);
1132 micfil->regmap = devm_regmap_init_mmio(&pdev->dev,
1135 if (IS_ERR(micfil->regmap)) {
1137 PTR_ERR(micfil->regmap));
1138 return PTR_ERR(micfil->regmap);
1145 &micfil->dataline);
1147 micfil->dataline = 1;
1149 if (micfil->dataline & ~micfil->soc->dataline) {
1151 micfil->soc->dataline);
1157 micfil->irq[i] = platform_get_irq(pdev, i);
1158 if (micfil->irq[i] < 0)
1159 return micfil->irq[i];
1163 ret = devm_request_irq(&pdev->dev, micfil->irq[0],
1165 micfil->name, micfil);
1168 micfil->irq[0]);
1173 ret = devm_request_irq(&pdev->dev, micfil->irq[1],
1175 micfil->name, micfil);
1178 micfil->irq[1]);
1183 ret = devm_request_threaded_irq(&pdev->dev, micfil->irq[2],
1185 IRQF_SHARED, micfil->name, micfil);
1188 micfil->irq[0]);
1193 ret = devm_request_irq(&pdev->dev, micfil->irq[3],
1195 micfil->name, micfil);
1198 micfil->irq[1]);
1202 micfil->dma_params_rx.chan_name = "rx";
1203 micfil->dma_params_rx.addr = res->start + REG_MICFIL_DATACH0;
1204 micfil->dma_params_rx.maxburst = MICFIL_DMA_MAXBURST_RX;
1206 platform_set_drvdata(pdev, micfil);
1219 /* Get micfil version */
1228 regcache_cache_only(micfil->regmap, true);
1240 fsl_micfil_dai.capture.formats = micfil->soc->formats;
1268 struct fsl_micfil *micfil = dev_get_drvdata(dev);
1270 regcache_cache_only(micfil->regmap, true);
1272 clk_disable_unprepare(micfil->mclk);
1273 clk_disable_unprepare(micfil->busclk);
1280 struct fsl_micfil *micfil = dev_get_drvdata(dev);
1283 ret = clk_prepare_enable(micfil->busclk);
1287 ret = clk_prepare_enable(micfil->mclk);
1289 clk_disable_unprepare(micfil->busclk);
1293 regcache_cache_only(micfil->regmap, false);
1294 regcache_mark_dirty(micfil->regmap);
1295 regcache_sync(micfil->regmap);
1312 .name = "fsl-micfil-dai",