Lines Matching defs:wm8962
3 * wm8962.c -- WM8962 ALSA SoC Audio driver
33 #include <sound/wm8962.h>
36 #include "wm8962.h"
95 struct wm8962_priv *wm8962 = container_of(nb, struct wm8962_priv, \
98 regcache_mark_dirty(wm8962->regmap); \
1439 static int wm8962_reset(struct wm8962_priv *wm8962)
1443 ret = regmap_write(wm8962->regmap, WM8962_SOFTWARE_RESET, 0x6243);
1447 return regmap_write(wm8962->regmap, WM8962_PLL_SOFTWARE_RESET, 0);
1474 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
1476 return regcache_sync_region(wm8962->regmap,
1505 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
1511 wm8962_dsp2_set_enable(component, wm8962->dsp2_ena);
1548 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
1550 ucontrol->value.integer.value[0] = !!(wm8962->dsp2_ena & 1 << shift);
1560 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
1561 int old = wm8962->dsp2_ena;
1566 mutex_lock(&wm8962->dsp2_ena_lock);
1569 wm8962->dsp2_ena |= 1 << shift;
1571 wm8962->dsp2_ena &= ~(1 << shift);
1573 if (wm8962->dsp2_ena == old)
1579 if (wm8962->dsp2_ena)
1580 wm8962_dsp2_set_enable(component, wm8962->dsp2_ena);
1586 mutex_unlock(&wm8962->dsp2_ena_lock);
2034 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
2038 if (wm8962->dsp2_ena)
2043 if (wm8962->dsp2_ena)
2419 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
2420 struct wm8962_pdata *pdata = &wm8962->pdata;
2468 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
2475 if (!wm8962->sysclk_rate) {
2480 if (!wm8962->bclk || !wm8962->lrclk) {
2486 if (sysclk_rates[i] == wm8962->sysclk_rate / wm8962->lrclk) {
2494 wm8962->sysclk_rate / wm8962->lrclk);
2533 dspclk = wm8962->sysclk_rate;
2536 dspclk = wm8962->sysclk_rate / 2;
2539 dspclk = wm8962->sysclk_rate / 4;
2543 dspclk = wm8962->sysclk_rate;
2546 dev_dbg(component->dev, "DSPCLK is %dHz, BCLK %d\n", dspclk, wm8962->bclk);
2555 diff = (dspclk / bclk_divs[i]) - wm8962->bclk;
2563 wm8962->bclk = dspclk / bclk_divs[best];
2566 bclk_divs[best], wm8962->bclk);
2568 aif2 |= wm8962->bclk / wm8962->lrclk;
2570 wm8962->bclk / wm8962->lrclk, wm8962->lrclk);
2631 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
2636 wm8962->bclk = snd_soc_params_to_bclk(params);
2638 wm8962->bclk *= 2;
2640 wm8962->lrclk = params_rate(params);
2643 if (sr_vals[i].rate == wm8962->lrclk) {
2649 dev_err(component->dev, "Unsupported rate %dHz\n", wm8962->lrclk);
2653 if (wm8962->lrclk % 8000 == 0)
2679 wm8962->bclk, wm8962->lrclk);
2691 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
2696 wm8962->sysclk = WM8962_SYSCLK_MCLK;
2700 wm8962->sysclk = WM8962_SYSCLK_FLL;
2710 wm8962->sysclk_rate = freq;
2887 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
2894 if (source == wm8962->fll_src && Fref == wm8962->fll_fref &&
2895 Fout == wm8962->fll_fout)
2901 wm8962->fll_fref = 0;
2902 wm8962->fll_fout = 0;
2959 reinit_completion(&wm8962->fll_lock);
2976 if (wm8962->irq)
2981 time_left = wait_for_completion_timeout(&wm8962->fll_lock,
2984 if (time_left == 0 && wm8962->irq) {
2992 wm8962->fll_fref = Fref;
2993 wm8962->fll_fout = Fout;
2994 wm8962->fll_src = source;
3037 .name = "wm8962",
3058 struct wm8962_priv *wm8962 = container_of(work,
3061 struct snd_soc_component *component = wm8962->component;
3078 snd_soc_jack_report(wm8962->jack, status,
3089 struct wm8962_priv *wm8962 = dev_get_drvdata(dev);
3100 ret = regmap_read(wm8962->regmap, WM8962_INTERRUPT_STATUS_2_MASK,
3109 ret = regmap_read(wm8962->regmap, WM8962_INTERRUPT_STATUS_2, &active);
3124 ret = regmap_write(wm8962->regmap, WM8962_INTERRUPT_STATUS_2, active);
3130 complete(&wm8962->fll_lock);
3139 ret = regmap_read(wm8962->regmap,
3167 &wm8962->mic_work,
3191 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3195 wm8962->jack = jack;
3210 snd_soc_jack_report(wm8962->jack, 0,
3235 struct wm8962_priv *wm8962 =
3237 struct snd_soc_component *component = wm8962->component;
3243 if (wm8962->beep_rate) {
3245 if (abs(wm8962->beep_rate - beep_rates[i]) <
3246 abs(wm8962->beep_rate - beep_rates[best]))
3251 beep_rates[best], wm8962->beep_rate);
3274 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3290 wm8962->beep_rate = hz;
3291 schedule_work(&wm8962->beep_work);
3298 struct wm8962_priv *wm8962 = dev_get_drvdata(dev);
3306 input_event(wm8962->beep, EV_SND, SND_TONE, time);
3315 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3318 wm8962->beep = devm_input_allocate_device(component->dev);
3319 if (!wm8962->beep) {
3324 INIT_WORK(&wm8962->beep_work, wm8962_beep_work);
3325 wm8962->beep_rate = 0;
3327 wm8962->beep->name = "WM8962 Beep Generator";
3328 wm8962->beep->phys = dev_name(component->dev);
3329 wm8962->beep->id.bustype = BUS_I2C;
3331 wm8962->beep->evbit[0] = BIT_MASK(EV_SND);
3332 wm8962->beep->sndbit[0] = BIT_MASK(SND_BELL) | BIT_MASK(SND_TONE);
3333 wm8962->beep->event = wm8962_beep_event;
3334 wm8962->beep->dev.parent = component->dev;
3335 input_set_drvdata(wm8962->beep, component);
3337 ret = input_register_device(wm8962->beep);
3339 wm8962->beep = NULL;
3352 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3355 cancel_work_sync(&wm8962->beep_work);
3356 wm8962->beep = NULL;
3361 static void wm8962_set_gpio_mode(struct wm8962_priv *wm8962, int gpio)
3382 regmap_update_bits(wm8962->regmap, WM8962_ANALOGUE_CLOCKING1,
3389 struct wm8962_priv *wm8962 = gpiochip_get_data(chip);
3405 wm8962_set_gpio_mode(wm8962, offset + 1);
3412 struct wm8962_priv *wm8962 = gpiochip_get_data(chip);
3413 struct snd_soc_component *component = wm8962->component;
3422 struct wm8962_priv *wm8962 = gpiochip_get_data(chip);
3423 struct snd_soc_component *component = wm8962->component;
3438 .label = "wm8962",
3448 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3449 struct wm8962_pdata *pdata = &wm8962->pdata;
3452 wm8962->gpio_chip = wm8962_template_chip;
3453 wm8962->gpio_chip.ngpio = WM8962_MAX_GPIO;
3454 wm8962->gpio_chip.parent = component->dev;
3457 wm8962->gpio_chip.base = pdata->gpio_base;
3459 wm8962->gpio_chip.base = -1;
3461 ret = gpiochip_add_data(&wm8962->gpio_chip, wm8962);
3468 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3470 gpiochip_remove(&wm8962->gpio_chip);
3486 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3490 wm8962->component = component;
3492 wm8962->disable_nb[0].notifier_call = wm8962_regulator_event_0;
3493 wm8962->disable_nb[1].notifier_call = wm8962_regulator_event_1;
3494 wm8962->disable_nb[2].notifier_call = wm8962_regulator_event_2;
3495 wm8962->disable_nb[3].notifier_call = wm8962_regulator_event_3;
3496 wm8962->disable_nb[4].notifier_call = wm8962_regulator_event_4;
3497 wm8962->disable_nb[5].notifier_call = wm8962_regulator_event_5;
3498 wm8962->disable_nb[6].notifier_call = wm8962_regulator_event_6;
3499 wm8962->disable_nb[7].notifier_call = wm8962_regulator_event_7;
3502 for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++) {
3504 wm8962->supplies[i].consumer,
3505 &wm8962->disable_nb[i]);
3552 struct wm8962_priv *wm8962 = snd_soc_component_get_drvdata(component);
3554 cancel_delayed_work_sync(&wm8962->mic_work);
3620 struct wm8962_priv *wm8962;
3624 wm8962 = devm_kzalloc(&i2c->dev, sizeof(*wm8962), GFP_KERNEL);
3625 if (wm8962 == NULL)
3628 mutex_init(&wm8962->dsp2_ena_lock);
3630 i2c_set_clientdata(i2c, wm8962);
3632 INIT_DELAYED_WORK(&wm8962->mic_work, wm8962_mic_work);
3633 init_completion(&wm8962->fll_lock);
3634 wm8962->irq = i2c->irq;
3638 memcpy(&wm8962->pdata, pdata, sizeof(struct wm8962_pdata));
3640 ret = wm8962_set_pdata_from_of(i2c, &wm8962->pdata);
3645 for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++)
3646 wm8962->supplies[i].supply = wm8962_supply_names[i];
3648 ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8962->supplies),
3649 wm8962->supplies);
3655 ret = regulator_bulk_enable(ARRAY_SIZE(wm8962->supplies),
3656 wm8962->supplies);
3662 wm8962->regmap = devm_regmap_init_i2c(i2c, &wm8962_regmap);
3663 if (IS_ERR(wm8962->regmap)) {
3664 ret = PTR_ERR(wm8962->regmap);
3674 regcache_cache_bypass(wm8962->regmap, true);
3676 ret = regmap_read(wm8962->regmap, WM8962_SOFTWARE_RESET, ®);
3688 ret = regmap_read(wm8962->regmap, WM8962_RIGHT_INPUT_VOLUME, ®);
3700 regcache_cache_bypass(wm8962->regmap, false);
3702 ret = wm8962_reset(wm8962);
3711 regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2,
3715 regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2,
3719 regmap_update_bits(wm8962->regmap, WM8962_PLL2,
3724 for (i = 0; i < ARRAY_SIZE(wm8962->pdata.gpio_init); i++)
3725 if (wm8962->pdata.gpio_init[i]) {
3726 wm8962_set_gpio_mode(wm8962, i + 1);
3727 regmap_write(wm8962->regmap, 0x200 + i,
3728 wm8962->pdata.gpio_init[i] & 0xffff);
3733 if (wm8962->pdata.spk_mono)
3734 regmap_update_bits(wm8962->regmap, WM8962_CLASS_D_CONTROL_2,
3739 if (wm8962->pdata.mic_cfg)
3740 regmap_update_bits(wm8962->regmap, WM8962_ADDITIONAL_CONTROL_4,
3745 wm8962->pdata.mic_cfg);
3748 regmap_update_bits(wm8962->regmap, WM8962_LEFT_INPUT_VOLUME,
3750 regmap_update_bits(wm8962->regmap, WM8962_RIGHT_INPUT_VOLUME,
3752 regmap_update_bits(wm8962->regmap, WM8962_LEFT_ADC_VOLUME,
3754 regmap_update_bits(wm8962->regmap, WM8962_RIGHT_ADC_VOLUME,
3756 regmap_update_bits(wm8962->regmap, WM8962_LEFT_DAC_VOLUME,
3758 regmap_update_bits(wm8962->regmap, WM8962_RIGHT_DAC_VOLUME,
3760 regmap_update_bits(wm8962->regmap, WM8962_SPKOUTL_VOLUME,
3762 regmap_update_bits(wm8962->regmap, WM8962_SPKOUTR_VOLUME,
3764 regmap_update_bits(wm8962->regmap, WM8962_HPOUTL_VOLUME,
3766 regmap_update_bits(wm8962->regmap, WM8962_HPOUTR_VOLUME,
3770 regmap_update_bits(wm8962->regmap, WM8962_EQ1,
3774 regmap_update_bits(wm8962->regmap, WM8962_IRQ_DEBOUNCE,
3779 if (wm8962->pdata.in4_dc_measure) {
3780 ret = regmap_register_patch(wm8962->regmap,
3789 if (wm8962->irq) {
3790 if (wm8962->pdata.irq_active_low) {
3798 regmap_update_bits(wm8962->regmap, WM8962_INTERRUPT_CONTROL,
3801 ret = devm_request_threaded_irq(&i2c->dev, wm8962->irq, NULL,
3804 "wm8962", &i2c->dev);
3807 wm8962->irq, ret);
3808 wm8962->irq = 0;
3812 regmap_update_bits(wm8962->regmap,
3828 regmap_update_bits(wm8962->regmap, WM8962_ADDITIONAL_CONTROL_4,
3830 regmap_update_bits(wm8962->regmap, WM8962_ADDITIONAL_CONTROL_4,
3833 regcache_cache_only(wm8962->regmap, true);
3836 regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
3843 regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
3856 struct wm8962_priv *wm8962 = dev_get_drvdata(dev);
3859 ret = clk_prepare_enable(wm8962->pdata.mclk);
3865 ret = regulator_bulk_enable(ARRAY_SIZE(wm8962->supplies),
3866 wm8962->supplies);
3872 regcache_cache_only(wm8962->regmap, false);
3874 wm8962_reset(wm8962);
3876 regcache_mark_dirty(wm8962->regmap);
3881 regmap_write_bits(wm8962->regmap, WM8962_CLOCKING2,
3885 regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2,
3889 regmap_update_bits(wm8962->regmap, WM8962_PLL2,
3893 regcache_sync(wm8962->regmap);
3895 regmap_update_bits(wm8962->regmap, WM8962_ANTI_POP,
3900 regmap_update_bits(wm8962->regmap, WM8962_PWR_MGMT_1,
3909 clk_disable_unprepare(wm8962->pdata.mclk);
3915 struct wm8962_priv *wm8962 = dev_get_drvdata(dev);
3917 regmap_update_bits(wm8962->regmap, WM8962_PWR_MGMT_1,
3920 regmap_update_bits(wm8962->regmap, WM8962_ANTI_POP,
3924 regcache_cache_only(wm8962->regmap, true);
3926 regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies),
3927 wm8962->supplies);
3929 clk_disable_unprepare(wm8962->pdata.mclk);
3941 { "wm8962" },
3947 { .compatible = "wlf,wm8962", },
3954 .name = "wm8962",