Lines Matching refs:reg
62 unsigned int reg)
67 if (reg == UDA1380_RESET)
69 if (reg >= UDA1380_CACHEREGNUM)
71 return cache[reg];
78 u16 reg, unsigned int value)
83 if (reg >= UDA1380_CACHEREGNUM)
85 if ((reg >= 0x10) && (cache[reg] != value))
86 set_bit(reg - 0x10, &uda1380_cache_dirty);
87 cache[reg] = value;
93 static int uda1380_write(struct snd_soc_component *component, unsigned int reg,
104 data[0] = reg;
108 uda1380_write_reg_cache(component, reg, value);
113 if (!snd_soc_component_active(component) && (reg >= UDA1380_MVOL))
115 pr_debug("uda1380: hw write %x val %x\n", reg, value);
126 if (reg >= 0x10)
127 clear_bit(reg - 0x10, &uda1380_cache_dirty);
136 int reg;
141 for (reg = 0; reg < UDA1380_MVOL; reg++) {
142 data[0] = reg;
143 data[1] = (cache[reg] & 0xff00) >> 8;
144 data[2] = cache[reg] & 0x00ff;
146 dev_err(component->dev, "%s: write to reg 0x%x failed\n",
147 __func__, reg);
180 int bit, reg;
183 reg = 0x10 + bit;
184 pr_debug("uda1380: flush reg %x val %x:\n", reg,
185 uda1380_read_reg_cache(uda1380_component, reg));
186 uda1380_write(uda1380_component, reg,
187 uda1380_read_reg_cache(uda1380_component, reg));
592 int reg;
622 for (reg = UDA1380_MVOL; reg < UDA1380_CACHEREGNUM; reg++)
623 set_bit(reg - 0x10, &uda1380_cache_dirty);