soc/codecs/rt1305.c

3  * rt1305.c  --  RT1305 ALSA SoC amplifier component driver
28 #include "rt1305.h"
245 	struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
247 	regmap_multi_reg_write(rt1305->regmap, init_list, RT1305_INIT_REG_LEN);
409 	struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
414 	if (rt1305->sysclk_src == RT1305_FS_SYS_PRE_S_PLL1 &&
426 	struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
428 	if (rt1305->sysclk_src == RT1305_FS_SYS_PRE_S_PLL1)
627 	struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
631 	rt1305->lrck = params_rate(params);
632 	pre_div = rt1305_get_clk_info(rt1305->sysclk, rt1305->lrck);
636 			rt1305->lrck * 64, rt1305->lrck * 256);
638 			rt1305->lrck * 256, SND_SOC_CLOCK_IN);
649 	rt1305->bclk = rt1305->lrck * (32 << bclk_ms);
655 				rt1305->lrck, pre_div, dai->id);
696 	struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
702 		rt1305->master = 1;
706 		rt1305->master = 0;
756 	struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
759 	if (freq == rt1305->sysclk && clk_id == rt1305->sysclk_src)
781 	rt1305->sysclk = freq;
782 	rt1305->sysclk_src = clk_id;
794 	struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
798 	if (source == rt1305->pll_src && freq_in == rt1305->pll_in &&
799 	    freq_out == rt1305->pll_out)
805 		rt1305->pll_in = 0;
806 		rt1305->pll_out = 0;
857 	rt1305->pll_in = freq_in;
858 	rt1305->pll_out = freq_out;
859 	rt1305->pll_src = source;
866 	struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
868 	rt1305->component = component;
878 	struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
880 	rt1305_reset(rt1305->regmap);
886 	struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
888 	regcache_cache_only(rt1305->regmap, true);
889 	regcache_mark_dirty(rt1305->regmap);
896 	struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);
898 	regcache_cache_only(rt1305->regmap, false);
899 	regcache_sync(rt1305->regmap);
920 		.name = "rt1305-aif",
967 	{ .compatible = "realtek,rt1305", },
984 	{ "rt1305" },
990 static void rt1305_calibrate(struct rt1305_priv *rt1305)
996 	regcache_cache_bypass(rt1305->regmap, true);
998 	rt1305_reset(rt1305->regmap);
999 	regmap_write(rt1305->regmap, RT1305_ADC_SET_3, 0x0219);
1000 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xcf, 0x5548);
1001 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc1, 0x0320);
1002 	regmap_write(rt1305->regmap, RT1305_CLOCK_DETECT, 0x1000);
1003 	regmap_write(rt1305->regmap, RT1305_CLK_1, 0x0600);
1004 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xffd0);
1005 	regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0080);
1006 	regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0880);
1007 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x0dfe);
1010 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x5d, 0x0442);
1012 	regmap_write(rt1305->regmap, RT1305_CAL_EFUSE_CLOCK, 0xb000);
1013 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc3, 0xd4a0);
1014 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xcc, 0x00cc);
1015 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xc1, 0x0320);
1016 	regmap_write(rt1305->regmap, RT1305_POWER_STATUS, 0x0000);
1017 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_2, 0xffff);
1018 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfc20);
1019 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x06, 0x00c0);
1020 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfca0);
1021 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfce0);
1022 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfcf0);
1025 	regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0080);
1026 	regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0880);
1027 	regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0880);
1028 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfce0);
1029 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfca0);
1030 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfc20);
1031 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x06, 0x0000);
1032 	regmap_write(rt1305->regmap, RT1305_EFUSE_1, 0x0000);
1034 	regmap_read(rt1305->regmap, RT1305_DAC_OFFSET_5, &valmsb);
1035 	regmap_read(rt1305->regmap, RT1305_DAC_OFFSET_6, &vallsb);
1037 	regmap_read(rt1305->regmap, RT1305_DAC_OFFSET_7, &valmsb);
1038 	regmap_read(rt1305->regmap, RT1305_DAC_OFFSET_8, &vallsb);
1043 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x5d, 0x9542);
1044 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0xfcf0);
1045 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_2, 0xffff);
1046 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x1dfe);
1047 	regmap_write(rt1305->regmap, RT1305_SILENCE_DETECT, 0x0e13);
1048 	regmap_write(rt1305->regmap, RT1305_CLK_1, 0x0650);
1050 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x50, 0x0064);
1051 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x51, 0x0770);
1052 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x52, 0xc30c);
1053 	regmap_write(rt1305->regmap, RT1305_SPK_TEMP_PROTECTION_1, 0x8200);
1054 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xfb00);
1055 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xff80);
1057 	regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x55, &rh);
1058 	regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x56, &rl);
1070 	regmap_write(rt1305->regmap, RT1305_SPK_TEMP_PROTECTION_1, 0x9200);
1071 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xfb00);
1072 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xd4, 0xff80);
1074 	regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x55, &rh);
1075 	regmap_read(rt1305->regmap, RT1305_PR_BASE + 0x56, &rl);
1087 	regmap_write(rt1305->regmap, RT1305_SPK_TEMP_PROTECTION_1, 0xc2ec);
1091 		regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x4e,
1093 		regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x4f,
1095 		regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xfe,
1097 		regmap_write(rt1305->regmap, RT1305_PR_BASE + 0xfd,
1104 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x0dfe);
1106 	regmap_write(rt1305->regmap, RT1305_PR_BASE + 0x5d, 0x0442);
1107 	regmap_write(rt1305->regmap, RT1305_CLOCK_DETECT, 0x3000);
1108 	regmap_write(rt1305->regmap, RT1305_CLK_1, 0x0400);
1109 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_1, 0x0000);
1110 	regmap_write(rt1305->regmap, RT1305_CAL_EFUSE_CLOCK, 0x8000);
1111 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_2, 0x1020);
1112 	regmap_write(rt1305->regmap, RT1305_POWER_CTRL_3, 0x0000);
1114 	regcache_cache_bypass(rt1305->regmap, false);
1119 	struct rt1305_priv *rt1305;
1123 	rt1305 = devm_kzalloc(&i2c->dev, sizeof(struct rt1305_priv),
1125 	if (rt1305 == NULL)
1128 	i2c_set_clientdata(i2c, rt1305);
1130 	rt1305->regmap = devm_regmap_init_i2c(i2c, &rt1305_regmap);
1131 	if (IS_ERR(rt1305->regmap)) {
1132 		ret = PTR_ERR(rt1305->regmap);
1138 	regmap_read(rt1305->regmap, RT1305_DEVICE_ID, &val);
1141 			"Device with ID register %x is not rt1305\n", val);
1145 	rt1305_reset(rt1305->regmap);
1146 	rt1305_calibrate(rt1305);
1155 	struct rt1305_priv *rt1305 = i2c_get_clientdata(client);
1157 	rt1305_reset(rt1305->regmap);
1163 		.name = "rt1305",