Lines Matching refs:PEB2466_CR1
91 #define PEB2466_CR1(_ch) PEB2466_MAKE_SOP(_ch, 0x1)
434 cr1_reg = PEB2466_CR1(0);
439 cr1_reg = PEB2466_CR1(0);
444 cr1_reg = PEB2466_CR1(1);
449 cr1_reg = PEB2466_CR1(1);
454 cr1_reg = PEB2466_CR1(2);
459 cr1_reg = PEB2466_CR1(2);
464 cr1_reg = PEB2466_CR1(3);
469 cr1_reg = PEB2466_CR1(3);
497 SOC_DAPM_SINGLE("TG1 Switch", PEB2466_CR1(0), 6, 1, 0),
498 SOC_DAPM_SINGLE("TG2 Switch", PEB2466_CR1(0), 7, 1, 0),
503 SOC_DAPM_SINGLE("TG1 Switch", PEB2466_CR1(1), 6, 1, 0),
504 SOC_DAPM_SINGLE("TG2 Switch", PEB2466_CR1(1), 7, 1, 0),
509 SOC_DAPM_SINGLE("TG1 Switch", PEB2466_CR1(2), 6, 1, 0),
510 SOC_DAPM_SINGLE("TG2 Switch", PEB2466_CR1(2), 7, 1, 0),
515 SOC_DAPM_SINGLE("TG1 Switch", PEB2466_CR1(3), 6, 1, 0),
516 SOC_DAPM_SINGLE("TG2 Switch", PEB2466_CR1(3), 7, 1, 0),
554 SND_SOC_DAPM_SUPPLY("CH0 PWR", PEB2466_CR1(0), 0, 0, NULL, 0),
555 SND_SOC_DAPM_SUPPLY("CH1 PWR", PEB2466_CR1(1), 0, 0, NULL, 0),
556 SND_SOC_DAPM_SUPPLY("CH2 PWR", PEB2466_CR1(2), 0, 0, NULL, 0),
557 SND_SOC_DAPM_SUPPLY("CH3 PWR", PEB2466_CR1(3), 0, 0, NULL, 0),
776 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR1(ch),
859 { .reg = PEB2466_CR1(0), .def = 0x00 },
866 { .reg = PEB2466_CR1(1), .def = 0x00 },
873 { .reg = PEB2466_CR1(2), .def = 0x00 },
880 { .reg = PEB2466_CR1(3), .def = 0x00 },