soc/codecs/peb2466.c

3 // peb2466.c  --  Infineon PEB2466 ALSA SoC driver
39 struct peb2466 {
134 static int peb2466_write_byte(struct peb2466 *peb2466, u8 cmd, u8 val)
137 		.tx_buf = &peb2466->spi_tx_buf,
141 	peb2466->spi_tx_buf[0] = cmd | PEB2466_CMD_W;
142 	peb2466->spi_tx_buf[1] = val;
144 	dev_dbg(&peb2466->spi->dev, "write byte (cmd %02x) %02x\n",
145 		peb2466->spi_tx_buf[0], peb2466->spi_tx_buf[1]);
147 	return spi_sync_transfer(peb2466->spi, &xfer, 1);
150 static int peb2466_read_byte(struct peb2466 *peb2466, u8 cmd, u8 *val)
153 		.tx_buf = &peb2466->spi_tx_buf,
154 		.rx_buf = &peb2466->spi_rx_buf,
159 	peb2466->spi_tx_buf[0] = cmd | PEB2466_CMD_R;
161 	ret = spi_sync_transfer(peb2466->spi, &xfer, 1);
165 	if (peb2466->spi_rx_buf[1] != 0x81) {
166 		dev_err(&peb2466->spi->dev,
168 			peb2466->spi_tx_buf[0], peb2466->spi_rx_buf[1]);
172 	*val = peb2466->spi_rx_buf[2];
174 	dev_dbg(&peb2466->spi->dev, "read byte (cmd %02x) %02x\n",
175 		peb2466->spi_tx_buf[0], *val);
180 static int peb2466_write_buf(struct peb2466 *peb2466, u8 cmd, const u8 *buf, unsigned int len)
183 		.tx_buf = &peb2466->spi_tx_buf,
190 	peb2466->spi_tx_buf[0] = cmd | PEB2466_CMD_W;
191 	memcpy(&peb2466->spi_tx_buf[1], buf, len);
193 	dev_dbg(&peb2466->spi->dev, "write buf (cmd %02x, %u) %*ph\n",
194 		peb2466->spi_tx_buf[0], len, len, &peb2466->spi_tx_buf[1]);
196 	return spi_sync_transfer(peb2466->spi, &xfer, 1);
201 	struct peb2466 *peb2466 = context;
211 		ret = peb2466_write_byte(peb2466, reg, val);
214 		dev_err(&peb2466->spi->dev, "Not a XOP or SOP command\n");
223 	struct peb2466 *peb2466 = context;
231 		ret = peb2466_read_byte(peb2466, reg, &tmp);
235 		dev_err(&peb2466->spi->dev, "Not a XOP or SOP command\n");
280 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(component);
291 	ret = peb2466_write_buf(peb2466, lkup_ctrl->reg,
381 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(component);
386 		ucontrol->value.enumerated.item[0] = peb2466->ch[0].tg1_freq_item;
389 		ucontrol->value.enumerated.item[0] = peb2466->ch[0].tg2_freq_item;
392 		ucontrol->value.enumerated.item[0] = peb2466->ch[1].tg1_freq_item;
395 		ucontrol->value.enumerated.item[0] = peb2466->ch[1].tg2_freq_item;
398 		ucontrol->value.enumerated.item[0] = peb2466->ch[2].tg1_freq_item;
401 		ucontrol->value.enumerated.item[0] = peb2466->ch[2].tg2_freq_item;
404 		ucontrol->value.enumerated.item[0] = peb2466->ch[3].tg1_freq_item;
407 		ucontrol->value.enumerated.item[0] = peb2466->ch[3].tg2_freq_item;
419 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(component);
433 		tg_freq_item = &peb2466->ch[0].tg1_freq_item;
438 		tg_freq_item = &peb2466->ch[0].tg2_freq_item;
443 		tg_freq_item = &peb2466->ch[1].tg1_freq_item;
448 		tg_freq_item = &peb2466->ch[1].tg2_freq_item;
453 		tg_freq_item = &peb2466->ch[2].tg1_freq_item;
458 		tg_freq_item = &peb2466->ch[2].tg2_freq_item;
463 		tg_freq_item = &peb2466->ch[3].tg1_freq_item;
468 		tg_freq_item = &peb2466->ch[3].tg2_freq_item;
480 		ret = regmap_update_bits(peb2466->regmap, cr1_reg, cr1_mask, 0);
484 		ret = peb2466_write_buf(peb2466, e->reg, peb2466_tone_lookup[index], 4);
487 		ret = regmap_update_bits(peb2466->regmap, cr1_reg, cr1_mask, cr1_mask);
668 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component);
689 			ret = regmap_write(peb2466->regmap, PEB2466_CR5(chan), slot);
705 	peb2466->max_chan_playback = chan;
712 			ret = regmap_write(peb2466->regmap, PEB2466_CR4(chan), slot);
728 	peb2466->max_chan_capture = chan;
735 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component);
750 	return regmap_write(peb2466->regmap, PEB2466_XR6, xr6);
757 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component);
770 		dev_err(&peb2466->spi->dev, "Unsupported format 0x%x\n",
776 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR1(ch),
795 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component);
800 		peb2466->max_chan_playback : peb2466->max_chan_capture;
832 	.name = "peb2466",
850 static int peb2466_reset_audio(struct peb2466 *peb2466)
889 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
890 		peb2466->ch[i].tg1_freq_item = PEB2466_TONE_1000HZ;
891 		peb2466->ch[i].tg2_freq_item = PEB2466_TONE_1000HZ;
900 		ret = peb2466_write_buf(peb2466, PEB2466_IMR1_FILTER_P1(i), imr1_p1, 8);
903 		ret = peb2466_write_buf(peb2466, PEB2466_IMR1_FILTER_P2(i), imr1_p2, 8);
908 		ret = peb2466_write_buf(peb2466, PEB2466_TH_FILTER_P1(i), zero, 8);
911 		ret = peb2466_write_buf(peb2466, PEB2466_TH_FILTER_P2(i), zero, 8);
914 		ret = peb2466_write_buf(peb2466, PEB2466_TH_FILTER_P3(i), zero, 8);
917 		ret = peb2466_write_buf(peb2466, PEB2466_FRX_FILTER(i), zero, 8);
920 		ret = peb2466_write_buf(peb2466, PEB2466_FRR_FILTER(i), zero, 8);
923 		ret = peb2466_write_buf(peb2466, PEB2466_AX_FILTER(i), zero, 4);
926 		ret = peb2466_write_buf(peb2466, PEB2466_AR_FILTER(i), zero, 4);
931 	return regmap_multi_reg_write(peb2466->regmap, reg_reset, ARRAY_SIZE(reg_reset));
937 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(component);
953 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
957 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
962 		ret = peb2466_write_buf(peb2466, PEB2466_TH_FILTER_P1(i), data + 1, 8);
966 		ret = peb2466_write_buf(peb2466, PEB2466_TH_FILTER_P2(i), data + 9, 8);
970 		ret = peb2466_write_buf(peb2466, PEB2466_TH_FILTER_P3(i), data + 17, 8);
974 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
986 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(component);
1001 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1005 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1010 		ret = peb2466_write_buf(peb2466, PEB2466_IMR1_FILTER_P1(i), data + 1, 8);
1014 		ret = peb2466_write_buf(peb2466, PEB2466_IMR1_FILTER_P2(i), data + 9, 8);
1018 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1029 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(component);
1043 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1047 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1052 		ret = peb2466_write_buf(peb2466, PEB2466_FRX_FILTER(i), data + 1, 8);
1056 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1067 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(component);
1081 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1085 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1090 		ret = peb2466_write_buf(peb2466, PEB2466_FRR_FILTER(i), data + 1, 8);
1094 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1105 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(component);
1119 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1123 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1128 		ret = peb2466_write_buf(peb2466, PEB2466_AX_FILTER(i), data + 1, 4);
1132 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1143 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(component);
1157 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1161 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1166 		ret = peb2466_write_buf(peb2466, PEB2466_AR_FILTER(i), data + 1, 4);
1170 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1188 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(component);
1238 	table = devm_kzalloc(&peb2466->spi->dev, table_size, GFP_KERNEL);
1244 	BUILD_BUG_ON(ARRAY_SIZE(peb2466_ax_ctrl_names) != ARRAY_SIZE(peb2466->ch));
1245 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1249 		lookup = &peb2466->ch[i].ax_lookup;
1253 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1258 		ret = peb2466_write_buf(peb2466, PEB2466_AX_FILTER(i),
1263 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1268 		lkup_ctrl = &peb2466->ch[i].ax_lkup_ctrl;
1292 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(component);
1342 	table = devm_kzalloc(&peb2466->spi->dev, table_size, GFP_KERNEL);
1348 	BUILD_BUG_ON(ARRAY_SIZE(peb2466_ar_ctrl_names) != ARRAY_SIZE(peb2466->ch));
1349 	for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1353 		lookup = &peb2466->ch[i].ar_lookup;
1357 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1362 		ret = peb2466_write_buf(peb2466, PEB2466_AR_FILTER(i),
1367 		ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1372 		lkup_ctrl = &peb2466->ch[i].ar_lkup_ctrl;
1553 	struct peb2466 *peb2466 = snd_soc_component_get_drvdata(component);
1557 	/* reset peb2466 audio part */
1558 	ret = peb2466_reset_audio(peb2466);
1562 	ret = of_property_read_string(peb2466->spi->dev.of_node,
1666 static unsigned int *peb2466_chip_gpio_get_cache(struct peb2466 *peb2466,
1673 		cache = &peb2466->gpio.cache.xr0;
1676 		cache = &peb2466->gpio.cache.xr1;
1679 		cache = &peb2466->gpio.cache.xr2;
1682 		cache = &peb2466->gpio.cache.xr3;
1691 static int peb2466_chip_gpio_update_bits(struct peb2466 *peb2466, unsigned int xr_reg,
1699 	 * Read and write accesses use different peb2466 internal signals (input
1705 	mutex_lock(&peb2466->gpio.lock);
1707 	cache = peb2466_chip_gpio_get_cache(peb2466, xr_reg);
1717 	ret = regmap_write(peb2466->regmap, xr_reg, tmp);
1725 	mutex_unlock(&peb2466->gpio.lock);
1731 	struct peb2466 *peb2466 = gpiochip_get_data(c);
1741 		dev_warn(&peb2466->spi->dev, "cannot set gpio %d (read-only)\n",
1748 		dev_err(&peb2466->spi->dev, "cannot set gpio %d (%d)\n",
1753 	ret = peb2466_chip_gpio_update_bits(peb2466, xr_reg, mask, val ? mask : 0);
1755 		dev_err(&peb2466->spi->dev, "set gpio %d (0x%x, 0x%x) failed (%d)\n",
1762 	struct peb2466 *peb2466 = gpiochip_get_data(c);
1781 		dev_err(&peb2466->spi->dev, "cannot get gpio %d (%d)\n",
1787 		cache = peb2466_chip_gpio_get_cache(peb2466, xr_reg);
1792 		ret = regmap_read(peb2466->regmap, xr_reg, &val);
1794 			dev_err(&peb2466->spi->dev, "get gpio %d (0x%x, 0x%x) failed (%d)\n",
1805 	struct peb2466 *peb2466 = gpiochip_get_data(c);
1822 		dev_err(&peb2466->spi->dev, "cannot get gpio %d direction (%d)\n",
1827 	ret = regmap_read(peb2466->regmap, xr_reg, &val);
1829 		dev_err(&peb2466->spi->dev, "get dir gpio %d (0x%x, 0x%x) failed (%d)\n",
1839 	struct peb2466 *peb2466 = gpiochip_get_data(c);
1855 		dev_err(&peb2466->spi->dev, "cannot set gpio %d direction (%d)\n",
1860 	ret = peb2466_chip_gpio_update_bits(peb2466, xr_reg, mask, 0);
1862 		dev_err(&peb2466->spi->dev, "Set dir in gpio %d (0x%x, 0x%x) failed (%d)\n",
1872 	struct peb2466 *peb2466 = gpiochip_get_data(c);
1891 		dev_err(&peb2466->spi->dev, "cannot set gpio %d direction (%d)\n",
1896 	ret = peb2466_chip_gpio_update_bits(peb2466, xr_reg, mask, mask);
1898 		dev_err(&peb2466->spi->dev, "Set dir in gpio %d (0x%x, 0x%x) failed (%d)\n",
1906 static int peb2466_reset_gpio(struct peb2466 *peb2466)
1916 	peb2466->gpio.cache.xr0 = 0;
1917 	peb2466->gpio.cache.xr1 = 0;
1918 	peb2466->gpio.cache.xr2 = 0;
1919 	peb2466->gpio.cache.xr3 = 0;
1921 	return regmap_multi_reg_write(peb2466->regmap, reg_reset, ARRAY_SIZE(reg_reset));
1924 static int peb2466_gpio_init(struct peb2466 *peb2466)
1928 	mutex_init(&peb2466->gpio.lock);
1930 	ret = peb2466_reset_gpio(peb2466);
1934 	peb2466->gpio.gpio_chip.owner = THIS_MODULE;
1935 	peb2466->gpio.gpio_chip.label = dev_name(&peb2466->spi->dev);
1936 	peb2466->gpio.gpio_chip.parent = &peb2466->spi->dev;
1937 	peb2466->gpio.gpio_chip.base = -1;
1938 	peb2466->gpio.gpio_chip.ngpio = 28;
1939 	peb2466->gpio.gpio_chip.get_direction = peb2466_chip_get_direction;
1940 	peb2466->gpio.gpio_chip.direction_input = peb2466_chip_direction_input;
1941 	peb2466->gpio.gpio_chip.direction_output = peb2466_chip_direction_output;
1942 	peb2466->gpio.gpio_chip.get = peb2466_chip_gpio_get;
1943 	peb2466->gpio.gpio_chip.set = peb2466_chip_gpio_set;
1944 	peb2466->gpio.gpio_chip.can_sleep = true;
1946 	return devm_gpiochip_add_data(&peb2466->spi->dev, &peb2466->gpio.gpio_chip,
1947 				      peb2466);
1952 	struct peb2466 *peb2466;
1962 	peb2466 = devm_kzalloc(&spi->dev, sizeof(*peb2466), GFP_KERNEL);
1963 	if (!peb2466)
1966 	peb2466->spi = spi;
1968 	peb2466->regmap = devm_regmap_init(&peb2466->spi->dev, NULL, peb2466,
1970 	if (IS_ERR(peb2466->regmap))
1971 		return PTR_ERR(peb2466->regmap);
1973 	peb2466->reset_gpio = devm_gpiod_get_optional(&peb2466->spi->dev,
1975 	if (IS_ERR(peb2466->reset_gpio))
1976 		return PTR_ERR(peb2466->reset_gpio);
1978 	peb2466->mclk = devm_clk_get(&peb2466->spi->dev, "mclk");
1979 	if (IS_ERR(peb2466->mclk))
1980 		return PTR_ERR(peb2466->mclk);
1981 	ret = clk_prepare_enable(peb2466->mclk);
1985 	if (peb2466->reset_gpio) {
1986 		gpiod_set_value_cansleep(peb2466->reset_gpio, 1);
1988 		gpiod_set_value_cansleep(peb2466->reset_gpio, 0);
1992 	spi_set_drvdata(spi, peb2466);
1994 	mclk_rate = clk_get_rate(peb2466->mclk);
2009 		dev_err(&peb2466->spi->dev, "Unsupported clock rate %lu\n",
2014 	ret = regmap_write(peb2466->regmap, PEB2466_XR5, xr5);
2016 		dev_err(&peb2466->spi->dev, "Setting MCLK failed (%d)\n", ret);
2026 		ret = peb2466_gpio_init(peb2466);
2034 	clk_disable_unprepare(peb2466->mclk);
2040 	struct peb2466 *peb2466 = spi_get_drvdata(spi);
2042 	clk_disable_unprepare(peb2466->mclk);
2046 	{ .compatible = "infineon,peb2466", },
2052 	{ "peb2466", 0 },
2059 		.name   = "peb2466",