soc/codecs/nau8540.c

27 #include "nau8540.h"
236 	struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
240 		regmap_update_bits(nau8540->regmap, NAU8540_REG_FEPGA2,
257 	struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
261 		regmap_update_bits(nau8540->regmap, NAU8540_REG_REFERENCE,
264 		regmap_update_bits(nau8540->regmap, NAU8540_REG_REFERENCE,
266 		regmap_update_bits(nau8540->regmap, NAU8540_REG_FEPGA2,
279 	struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
284 		regmap_update_bits(nau8540->regmap, NAU8540_REG_POWER_MANAGEMENT,
286 		regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1,
288 		regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2,
291 		regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1,
293 		regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2,
295 		regmap_update_bits(nau8540->regmap, NAU8540_REG_POWER_MANAGEMENT,
305 	struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
308 		regmap_write(nau8540->regmap, NAU8540_REG_RST, 0x0001);
309 		regmap_write(nau8540->regmap, NAU8540_REG_RST, 0x0000);
405 nau8540_get_osr(struct nau8540 *nau8540)
409 	regmap_read(nau8540->regmap, NAU8540_REG_ADC_SAMPLE_RATE, &osr);
420 	struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
423 	osr = nau8540_get_osr(nau8540);
436 	struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
446 	osr = nau8540_get_osr(nau8540);
451 	regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC,
472 	regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL0,
481 	struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
525 	regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL0,
528 	regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1,
530 	regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2,
552 	struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
565 	regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL4,
568 	regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1,
570 	regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2,
581 	struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
582 	struct regmap *regmap = nau8540->regmap;
598 		dev_dbg(nau8540->dev, "1.ADC CH1 peak data %x", val);
607 			dev_dbg(nau8540->dev, "2.ADC CH1 peak data %x", val);
609 				dev_err(nau8540->dev, "Channel recovery failed!!");
639 	.name = "nau8540-hifi",
760 	struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
766 		regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL3,
772 		regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL3,
779 		regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL3,
786 		dev_err(nau8540->dev, "Invalid clock id (%d)\n", pll_id);
789 	dev_dbg(nau8540->dev, "Sysclk is %dHz and clock id is %d\n",
795 		dev_err(nau8540->dev, "Unsupported input clock %d\n", freq_in);
798 	dev_dbg(nau8540->dev, "mclk_src=%x ratio=%x fll_frac=%x fll_int=%x clk_ref_div=%x\n",
802 	nau8540_fll_apply(nau8540->regmap, &fll_param);
804 	regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC,
813 	struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
818 		regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC,
820 		regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL6,
825 		regmap_update_bits(nau8540->regmap, NAU8540_REG_FLL6,
827 		regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC,
832 		dev_err(nau8540->dev, "Invalid clock id (%d)\n", clk_id);
836 	dev_dbg(nau8540->dev, "Sysclk is %dHz and clock id is %d\n",
848 static void nau8540_init_regs(struct nau8540 *nau8540)
850 	struct regmap *regmap = nau8540->regmap;
887 	struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
889 	regcache_cache_only(nau8540->regmap, true);
890 	regcache_mark_dirty(nau8540->regmap);
897 	struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
899 	regcache_cache_only(nau8540->regmap, false);
900 	regcache_sync(nau8540->regmap);
939 	struct nau8540 *nau8540 = dev_get_platdata(dev);
942 	if (!nau8540) {
943 		nau8540 = devm_kzalloc(dev, sizeof(*nau8540), GFP_KERNEL);
944 		if (!nau8540)
947 	i2c_set_clientdata(i2c, nau8540);
949 	nau8540->regmap = devm_regmap_init_i2c(i2c, &nau8540_regmap_config);
950 	if (IS_ERR(nau8540->regmap))
951 		return PTR_ERR(nau8540->regmap);
952 	ret = regmap_read(nau8540->regmap, NAU8540_REG_I2C_DEVICE_ID, &value);
959 	nau8540->dev = dev;
960 	nau8540_reset_chip(nau8540->regmap);
961 	nau8540_init_regs(nau8540);
968 	{ "nau8540" },
975 	{ .compatible = "nuvoton,nau8540", },
983 		.name = "nau8540",