soc/codecs/cx2072x.c

31 #include "cx2072x.h"
93  * cx2072x register cache.
583 static int cx2072x_config_pll(struct cx2072x_priv *cx2072x)
585 	struct device *dev = cx2072x->dev;
594 	unsigned int sample_rate = cx2072x->sample_rate;
621 	pre_div = get_div_from_mclk(cx2072x->mclk_rate);
622 	pll_input = cx2072x->mclk_rate / pre_div;
636 	regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST4,
640 		regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST7, 0x100);
643 		regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST6,
645 		regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST7,
650 	regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST8, int_div);
655 		regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST16, 0x00);
658 		regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST16,
660 		regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST17,
662 		regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST18,
664 		regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST19, 0x01);
665 		regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST20, 0x02);
666 		regmap_update_bits(cx2072x->regmap, CX2072X_DIGITAL_TEST16,
673 static int cx2072x_config_i2spcm(struct cx2072x_priv *cx2072x)
675 	struct device *dev = cx2072x->dev;
682 	int frame_len = cx2072x->frame_size;
683 	int sample_size = cx2072x->sample_size;
697 	const unsigned int fmt = cx2072x->dai_fmt;
801 	if (cx2072x->en_aec_ref)
813 		if (cx2072x->en_aec_ref)
828 	bclk_rate = cx2072x->sample_rate * frame_len;
832 	regmap_write(cx2072x->regmap, CX2072X_I2SPCM_CONTROL5, 0);
847 	regmap_write(cx2072x->regmap, CX2072X_I2SPCM_CONTROL1, reg1.ulval);
848 	regmap_update_bits(cx2072x->regmap, CX2072X_I2SPCM_CONTROL2, 0xffffffc0,
850 	regmap_update_bits(cx2072x->regmap, CX2072X_I2SPCM_CONTROL3, 0xffffffc0,
852 	regmap_write(cx2072x->regmap, CX2072X_I2SPCM_CONTROL4, reg4.ulval);
853 	regmap_write(cx2072x->regmap, CX2072X_I2SPCM_CONTROL6, reg6.ulval);
854 	regmap_write(cx2072x->regmap, CX2072X_I2SPCM_CONTROL5, reg5.ulval);
856 	regmap_write(cx2072x->regmap, CX2072X_DIGITAL_BIOS_TEST2,
866 	struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
870 		regmap_update_bits(cx2072x->regmap, CX2072X_DIGITAL_BIOS_TEST0,
875 		regmap_update_bits(cx2072x->regmap, CX2072X_DIGITAL_BIOS_TEST0,
912 	struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
927 	if (cx2072x->mclk_rate == 0) {
932 	if (cx2072x->bclk_ratio)
933 		frame_size = cx2072x->bclk_ratio;
952 	cx2072x->frame_size = frame_size;
953 	cx2072x->sample_size = sample_size;
954 	cx2072x->sample_rate = sample_rate;
957 		cx2072x->en_aec_ref = true;
958 		dev_dbg(cx2072x->dev, "enables aec reference\n");
959 		regmap_write(cx2072x->regmap,
963 	if (cx2072x->pll_changed) {
964 		cx2072x_config_pll(cx2072x);
965 		cx2072x->pll_changed = false;
968 	if (cx2072x->i2spcm_changed) {
969 		cx2072x_config_i2spcm(cx2072x);
970 		cx2072x->i2spcm_changed = false;
980 	struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
982 	cx2072x->bclk_ratio = ratio;
990 	struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
992 	if (clk_set_rate(cx2072x->mclk, freq)) {
997 	cx2072x->mclk_rate = freq;
1004 	struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1044 	cx2072x->dai_fmt = fmt;
1348 	struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1353 		regmap_write(cx2072x->regmap, CX2072X_AFG_POWER_STATE, 0);
1355 		regmap_write(cx2072x->regmap, CX2072X_AFG_POWER_STATE, 3);
1370 	struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1374 	regmap_write(cx2072x->regmap, CX2072X_GPIO_STICKY_MASK, 0x1f);
1377 	regmap_write(cx2072x->regmap, CX2072X_UM_INTERRUPT_CRTL_E, 0x12 << 24);
1380 	regmap_write(cx2072x->regmap, CX2072X_PORTA_UNSOLICITED_RESPONSE, 0x80);
1383 	regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST15, 0x73);
1386 	regmap_write(cx2072x->regmap, CX2072X_ANALOG_TEST12, 0x300);
1389 	regmap_write(cx2072x->regmap, CX2072X_DIGITAL_TEST1, 0);
1402 	struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1404 	regmap_write(cx2072x->regmap, CX2072X_UM_INTERRUPT_CRTL_E, 0);
1405 	regmap_write(cx2072x->regmap, CX2072X_PORTA_UNSOLICITED_RESPONSE, 0);
1411 	struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1416 	mutex_lock(&cx2072x->lock);
1418 	regmap_read(cx2072x->regmap, CX2072X_PORTA_PIN_SENSE, &jack);
1420 	regmap_read(cx2072x->regmap, CX2072X_DIGITAL_TEST11, &type);
1440 	regmap_write(cx2072x->regmap, CX2072X_UM_INTERRUPT_CRTL_E, 0x12 << 24);
1442 	mutex_unlock(&cx2072x->lock);
1460 	struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1468 	if (!cx2072x->jack_gpio.gpiod_dev) {
1469 		cx2072x->jack_gpio = cx2072x_jack_gpio;
1470 		cx2072x->jack_gpio.gpiod_dev = codec->dev;
1471 		cx2072x->jack_gpio.data = codec;
1472 		err = snd_soc_jack_add_gpios(jack, 1, &cx2072x->jack_gpio);
1474 			cx2072x->jack_gpio.gpiod_dev = NULL;
1485 	struct cx2072x_priv *cx2072x = snd_soc_component_get_drvdata(codec);
1487 	cx2072x->codec = codec;
1499 	regmap_write(cx2072x->regmap, CX2072X_AFG_POWER_STATE, 0);
1501 	regmap_multi_reg_write(cx2072x->regmap, cx2072x_reg_init,
1505 	regmap_update_bits(cx2072x->regmap, CX2072X_PORTC_PIN_CTRL,
1508 	regmap_update_bits(cx2072x->regmap, CX2072X_DIGITAL_BIOS_TEST2,
1511 	regmap_write(cx2072x->regmap, CX2072X_AFG_POWER_STATE, 3);
1542 	struct cx2072x_priv *cx2072x =
1545 	cx2072x->en_aec_ref = true;
1561 		.name = "cx2072x-hifi",
1581 		.name = "cx2072x-dsp",
1593 		.name = "cx2072x-aec",
1621 	struct cx2072x_priv *cx2072x = dev_get_drvdata(dev);
1623 	clk_disable_unprepare(cx2072x->mclk);
1629 	struct cx2072x_priv *cx2072x = dev_get_drvdata(dev);
1631 	return clk_prepare_enable(cx2072x->mclk);
1636 	struct cx2072x_priv *cx2072x;
1640 	cx2072x = devm_kzalloc(&i2c->dev, sizeof(struct cx2072x_priv),
1642 	if (!cx2072x)
1645 	cx2072x->regmap = devm_regmap_init(&i2c->dev, NULL, i2c,
1647 	if (IS_ERR(cx2072x->regmap))
1648 		return PTR_ERR(cx2072x->regmap);
1650 	mutex_init(&cx2072x->lock);
1652 	i2c_set_clientdata(i2c, cx2072x);
1654 	cx2072x->dev = &i2c->dev;
1655 	cx2072x->pll_changed = true;
1656 	cx2072x->i2spcm_changed = true;
1657 	cx2072x->bclk_ratio = 0;
1659 	cx2072x->mclk = devm_clk_get(cx2072x->dev, "mclk");
1660 	if (IS_ERR(cx2072x->mclk)) {
1661 		dev_err(cx2072x->dev, "Failed to get MCLK\n");
1662 		return PTR_ERR(cx2072x->mclk);
1665 	regmap_read(cx2072x->regmap, CX2072X_VENDOR_ID, &ven_id);
1666 	regmap_read(cx2072x->regmap, CX2072X_REVISION_ID, &rev_id);
1668 	dev_info(cx2072x->dev, "codec version: %08x,%08x\n", ven_id, rev_id);
1670 	ret = devm_snd_soc_register_component(cx2072x->dev,
1677 	pm_runtime_use_autosuspend(cx2072x->dev);
1678 	pm_runtime_enable(cx2072x->dev);
1712 		.name = "cx2072x",
1723 MODULE_DESCRIPTION("ASoC cx2072x Codec Driver");