Lines Matching defs:cs42l42
3 * cs42l42.c -- CS42L42 ALSA SoC audio driver
33 #include <dt-bindings/sound/cs42l42.h>
35 #include "cs42l42.h"
481 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
485 cs42l42->hp_adc_up_pending = true;
489 if (cs42l42->hp_adc_up_pending) {
492 cs42l42->hp_adc_up_pending = false;
566 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
569 mutex_lock(&cs42l42->irq_lock);
570 cs42l42->jack = jk;
573 switch (cs42l42->hs_type) {
585 mutex_unlock(&cs42l42->irq_lock);
668 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
672 if (cs42l42->stream_use) {
673 if (pll_ratio_table[cs42l42->pll_config].sclk == clk)
685 cs42l42->pll_config = i;
756 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
760 if (cs42l42->stream_use)
893 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
900 if (cs42l42->sclk)
914 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
923 if (cs42l42->bclk_ratio) {
925 bclk = cs42l42->bclk_ratio * params_rate(params);
926 } else if (cs42l42->sclk) {
928 bclk = cs42l42->sclk;
996 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
1000 cs42l42->sclk = 0;
1006 cs42l42->sclk = freq;
1020 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
1022 cs42l42->bclk_ratio = bclk_ratio;
1030 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
1043 cs42l42->stream_use &= ~(1 << stream);
1044 if (!cs42l42->stream_use) {
1050 regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_osc_seq,
1064 if (!cs42l42->stream_use) {
1073 if (pll_ratio_table[cs42l42->pll_config].mclk_src_sel) {
1077 if (pll_ratio_table[cs42l42->pll_config].n > 1) {
1080 regval = pll_ratio_table[cs42l42->pll_config].pll_divout;
1087 ret = regmap_read_poll_timeout(cs42l42->regmap,
1104 regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_sclk_seq,
1107 cs42l42->stream_use |= 1 << stream;
1136 .name = "cs42l42",
1157 static void cs42l42_manual_hs_type_detect(struct cs42l42_private *cs42l42)
1165 regmap_update_bits(cs42l42->regmap,
1177 regmap_update_bits(cs42l42->regmap,
1185 regmap_write(cs42l42->regmap, CS42L42_HS_SWITCH_CTL, CS42L42_HSDET_SW_COMP1);
1189 regmap_read(cs42l42->regmap, CS42L42_HS_DET_STATUS, &hs_det_status);
1197 regmap_write(cs42l42->regmap, CS42L42_HS_SWITCH_CTL, CS42L42_HSDET_SW_COMP2);
1201 regmap_read(cs42l42->regmap, CS42L42_HS_DET_STATUS, &hs_det_status);
1211 cs42l42->hs_type = CS42L42_PLUG_CTIA;
1215 cs42l42->hs_type = CS42L42_PLUG_OMTP;
1222 cs42l42->hs_type = CS42L42_PLUG_CTIA;
1226 cs42l42->hs_type = CS42L42_PLUG_OMTP;
1231 cs42l42->hs_type = CS42L42_PLUG_HEADPHONE;
1238 regmap_write(cs42l42->regmap, CS42L42_HS_SWITCH_CTL, hs_det_sw);
1241 regmap_update_bits(cs42l42->regmap,
1253 regmap_update_bits(cs42l42->regmap,
1261 static void cs42l42_process_hs_type_detect(struct cs42l42_private *cs42l42)
1267 regmap_read(cs42l42->regmap, CS42L42_HS_DET_STATUS, &hs_det_status);
1270 regmap_update_bits(cs42l42->regmap,
1278 cs42l42->hs_type = (hs_det_status & CS42L42_HSDET_TYPE_MASK) >>
1282 regmap_update_bits(cs42l42->regmap,
1297 if (cs42l42->hs_type == CS42L42_PLUG_INVALID ||
1298 cs42l42->hs_type == CS42L42_PLUG_HEADPHONE) {
1299 dev_dbg(cs42l42->dev, "Running Manual Detection Fallback\n");
1300 cs42l42_manual_hs_type_detect(cs42l42);
1304 if ((cs42l42->hs_type == CS42L42_PLUG_CTIA) ||
1305 (cs42l42->hs_type == CS42L42_PLUG_OMTP)) {
1307 regmap_update_bits(cs42l42->regmap,
1319 regmap_update_bits(cs42l42->regmap,
1326 (cs42l42->bias_thresholds[0] <<
1330 regmap_update_bits(cs42l42->regmap,
1336 (cs42l42->hs_bias_sense_en << CS42L42_HSBIAS_SENSE_EN_SHIFT) |
1342 regmap_update_bits(cs42l42->regmap,
1349 msleep(cs42l42->btn_det_init_dbnce);
1352 regmap_read(cs42l42->regmap, CS42L42_DET_INT_STATUS2,
1356 regmap_update_bits(cs42l42->regmap,
1370 regmap_update_bits(cs42l42->regmap,
1378 regmap_update_bits(cs42l42->regmap,
1392 regmap_update_bits(cs42l42->regmap,
1400 static void cs42l42_init_hs_type_detect(struct cs42l42_private *cs42l42)
1403 regmap_update_bits(cs42l42->regmap,
1411 regmap_update_bits(cs42l42->regmap,
1419 regmap_update_bits(cs42l42->regmap,
1431 regmap_update_bits(cs42l42->regmap,
1442 regmap_update_bits(cs42l42->regmap,
1456 regmap_update_bits(cs42l42->regmap,
1464 msleep(cs42l42->hs_bias_ramp_time);
1467 regmap_update_bits(cs42l42->regmap,
1475 regmap_update_bits(cs42l42->regmap,
1487 static void cs42l42_cancel_hs_type_detect(struct cs42l42_private *cs42l42)
1490 regmap_update_bits(cs42l42->regmap,
1504 regmap_update_bits(cs42l42->regmap,
1512 regmap_update_bits(cs42l42->regmap,
1524 regmap_update_bits(cs42l42->regmap,
1536 static int cs42l42_handle_button_press(struct cs42l42_private *cs42l42)
1542 regmap_update_bits(cs42l42->regmap,
1555 usleep_range(cs42l42->btn_det_event_dbnce * 1000,
1556 cs42l42->btn_det_event_dbnce * 2000);
1562 regmap_update_bits(cs42l42->regmap,
1569 (cs42l42->bias_thresholds[bias_level] <<
1572 regmap_read(cs42l42->regmap, CS42L42_DET_STATUS2,
1580 dev_dbg(cs42l42->dev, "Function C button press\n");
1584 dev_dbg(cs42l42->dev, "Function B button press\n");
1588 dev_dbg(cs42l42->dev, "Function D button press\n");
1592 dev_dbg(cs42l42->dev, "Function A button press\n");
1600 regmap_update_bits(cs42l42->regmap,
1607 (cs42l42->bias_thresholds[0] << CS42L42_HS_DET_LEVEL_SHIFT));
1610 regmap_read(cs42l42->regmap, CS42L42_DET_INT_STATUS2,
1614 regmap_update_bits(cs42l42->regmap,
1665 struct cs42l42_private *cs42l42 = (struct cs42l42_private *)data;
1672 pm_runtime_get_sync(cs42l42->dev);
1673 mutex_lock(&cs42l42->irq_lock);
1674 if (cs42l42->suspended || !cs42l42->init_done) {
1675 mutex_unlock(&cs42l42->irq_lock);
1676 pm_runtime_put_autosuspend(cs42l42->dev);
1682 regmap_read(cs42l42->regmap, irq_params_table[i].status_addr,
1684 regmap_read(cs42l42->regmap, irq_params_table[i].mask_addr,
1708 cs42l42_process_hs_type_detect(cs42l42);
1709 switch (cs42l42->hs_type) {
1712 snd_soc_jack_report(cs42l42->jack, SND_JACK_HEADSET,
1718 snd_soc_jack_report(cs42l42->jack, SND_JACK_HEADPHONE,
1726 dev_dbg(cs42l42->dev, "Auto detect done (%d)\n", cs42l42->hs_type);
1734 if (cs42l42->plug_state != CS42L42_TS_PLUG) {
1735 cs42l42->plug_state = CS42L42_TS_PLUG;
1736 cs42l42_init_hs_type_detect(cs42l42);
1741 if (cs42l42->plug_state != CS42L42_TS_UNPLUG) {
1742 cs42l42->plug_state = CS42L42_TS_UNPLUG;
1743 cs42l42_cancel_hs_type_detect(cs42l42);
1745 snd_soc_jack_report(cs42l42->jack, 0,
1750 dev_dbg(cs42l42->dev, "Unplug event\n");
1755 cs42l42->plug_state = CS42L42_TS_TRANS;
1760 if (cs42l42->plug_state == CS42L42_TS_PLUG && ((~masks[7]) & irq_params_table[7].mask)) {
1765 dev_dbg(cs42l42->dev, "Button released\n");
1766 snd_soc_jack_report(cs42l42->jack, 0,
1770 snd_soc_jack_report(cs42l42->jack,
1771 cs42l42_handle_button_press(cs42l42),
1778 mutex_unlock(&cs42l42->irq_lock);
1779 pm_runtime_mark_last_busy(cs42l42->dev);
1780 pm_runtime_put_autosuspend(cs42l42->dev);
1786 static void cs42l42_set_interrupt_masks(struct cs42l42_private *cs42l42)
1788 regmap_update_bits(cs42l42->regmap, CS42L42_ADC_OVFL_INT_MASK,
1792 regmap_update_bits(cs42l42->regmap, CS42L42_MIXER_INT_MASK,
1802 regmap_update_bits(cs42l42->regmap, CS42L42_SRC_INT_MASK,
1812 regmap_update_bits(cs42l42->regmap, CS42L42_ASP_RX_INT_MASK,
1824 regmap_update_bits(cs42l42->regmap, CS42L42_ASP_TX_INT_MASK,
1834 regmap_update_bits(cs42l42->regmap, CS42L42_CODEC_INT_MASK,
1840 regmap_update_bits(cs42l42->regmap, CS42L42_SRCPL_INT_MASK,
1850 regmap_update_bits(cs42l42->regmap, CS42L42_DET_INT1_MASK,
1858 regmap_update_bits(cs42l42->regmap, CS42L42_DET_INT2_MASK,
1870 regmap_update_bits(cs42l42->regmap, CS42L42_VPMON_INT_MASK,
1874 regmap_update_bits(cs42l42->regmap, CS42L42_PLL_LOCK_INT_MASK,
1878 regmap_update_bits(cs42l42->regmap, CS42L42_TSRS_PLUG_INT_MASK,
1889 static void cs42l42_setup_hs_type_detect(struct cs42l42_private *cs42l42)
1893 cs42l42->hs_type = CS42L42_PLUG_INVALID;
1899 regmap_update_bits(cs42l42->regmap, CS42L42_MISC_DET_CTL,
1903 regmap_update_bits(cs42l42->regmap, CS42L42_MIC_DET_CTL1,
1909 (cs42l42->bias_thresholds[0] <<
1913 regmap_update_bits(cs42l42->regmap,
1919 regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
1922 regmap_update_bits(cs42l42->regmap, CS42L42_TIPSENSE_CTL,
1927 (!cs42l42->ts_inv << CS42L42_TIP_SENSE_INV_SHIFT) |
1931 regmap_read(cs42l42->regmap,
1934 cs42l42->plug_state = (((char) reg) &
1947 struct cs42l42_private *cs42l42)
1959 cs42l42->ts_inv = val;
1965 cs42l42->ts_inv = CS42L42_TS_INV_DIS;
1968 cs42l42->ts_inv = CS42L42_TS_INV_DIS;
1982 cs42l42->ts_dbnc_rise = val;
1988 cs42l42->ts_dbnc_rise = CS42L42_TS_DBNCE_1000;
1991 cs42l42->ts_dbnc_rise = CS42L42_TS_DBNCE_1000;
1994 regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
1996 (cs42l42->ts_dbnc_rise <<
2010 cs42l42->ts_dbnc_fall = val;
2016 cs42l42->ts_dbnc_fall = CS42L42_TS_DBNCE_0;
2019 cs42l42->ts_dbnc_fall = CS42L42_TS_DBNCE_0;
2022 regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
2024 (cs42l42->ts_dbnc_fall <<
2030 cs42l42->btn_det_init_dbnce = val;
2035 cs42l42->btn_det_init_dbnce =
2039 cs42l42->btn_det_init_dbnce =
2046 cs42l42->btn_det_event_dbnce = val;
2050 cs42l42->btn_det_event_dbnce =
2054 cs42l42->btn_det_event_dbnce =
2063 cs42l42->bias_thresholds[i] = thresholds[i];
2068 cs42l42->bias_thresholds[i] = threshold_defaults[i];
2073 cs42l42->bias_thresholds[i] = threshold_defaults[i];
2080 cs42l42->hs_bias_ramp_rate = val;
2081 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME0;
2084 cs42l42->hs_bias_ramp_rate = val;
2085 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME1;
2088 cs42l42->hs_bias_ramp_rate = val;
2089 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME2;
2092 cs42l42->hs_bias_ramp_rate = val;
2093 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME3;
2099 cs42l42->hs_bias_ramp_rate = CS42L42_HSBIAS_RAMP_SLOW;
2100 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME2;
2103 cs42l42->hs_bias_ramp_rate = CS42L42_HSBIAS_RAMP_SLOW;
2104 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME2;
2107 regmap_update_bits(cs42l42->regmap, CS42L42_HS_BIAS_CTL,
2109 (cs42l42->hs_bias_ramp_rate <<
2113 cs42l42->hs_bias_sense_en = 0;
2115 cs42l42->hs_bias_sense_en = 1;
2155 struct cs42l42_private *cs42l42 = dev_get_drvdata(dev);
2160 if (!cs42l42->init_done)
2168 mutex_lock(&cs42l42->irq_lock);
2169 cs42l42->suspended = true;
2173 regmap_read(cs42l42->regmap, cs42l42_shutdown_seq[i].reg, ®);
2178 regmap_multi_reg_write(cs42l42->regmap,
2183 mutex_unlock(&cs42l42->irq_lock);
2187 ret = regmap_read_poll_timeout(cs42l42->regmap,
2196 regmap_update_bits(cs42l42->regmap, CS42L42_PWR_CTL2,
2199 regcache_cache_only(cs42l42->regmap, true);
2200 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0);
2201 regulator_bulk_disable(ARRAY_SIZE(cs42l42->supplies), cs42l42->supplies);
2205 regmap_write(cs42l42->regmap, cs42l42_shutdown_seq[i].reg, save_regs[i]);
2208 regcache_drop_region(cs42l42->regmap, CS42L42_PAGE_REGISTER, CS42L42_PAGE_REGISTER);
2219 struct cs42l42_private *cs42l42 = dev_get_drvdata(dev);
2222 if (!cs42l42->init_done)
2230 if (cs42l42->plug_state != CS42L42_TS_UNPLUG)
2231 cs42l42->plug_state = CS42L42_TS_TRANS;
2233 ret = regulator_bulk_enable(ARRAY_SIZE(cs42l42->supplies), cs42l42->supplies);
2239 gpiod_set_value_cansleep(cs42l42->reset_gpio, 1);
2250 struct cs42l42_private *cs42l42 = dev_get_drvdata(dev);
2252 regcache_cache_only(cs42l42->regmap, false);
2253 regcache_mark_dirty(cs42l42->regmap);
2255 mutex_lock(&cs42l42->irq_lock);
2257 regcache_sync_region(cs42l42->regmap, CS42L42_MIC_DET_CTL1, CS42L42_MIC_DET_CTL1);
2258 regcache_sync(cs42l42->regmap);
2260 cs42l42->suspended = false;
2261 mutex_unlock(&cs42l42->irq_lock);
2280 int cs42l42_common_probe(struct cs42l42_private *cs42l42,
2286 dev_set_drvdata(cs42l42->dev, cs42l42);
2287 mutex_init(&cs42l42->irq_lock);
2289 BUILD_BUG_ON(ARRAY_SIZE(cs42l42_supply_names) != ARRAY_SIZE(cs42l42->supplies));
2290 for (i = 0; i < ARRAY_SIZE(cs42l42->supplies); i++)
2291 cs42l42->supplies[i].supply = cs42l42_supply_names[i];
2293 ret = devm_regulator_bulk_get(cs42l42->dev,
2294 ARRAY_SIZE(cs42l42->supplies),
2295 cs42l42->supplies);
2297 dev_err(cs42l42->dev,
2302 ret = regulator_bulk_enable(ARRAY_SIZE(cs42l42->supplies),
2303 cs42l42->supplies);
2305 dev_err(cs42l42->dev,
2311 cs42l42->reset_gpio = devm_gpiod_get_optional(cs42l42->dev,
2313 if (IS_ERR(cs42l42->reset_gpio)) {
2314 ret = PTR_ERR(cs42l42->reset_gpio);
2318 if (cs42l42->reset_gpio) {
2319 dev_dbg(cs42l42->dev, "Found reset GPIO\n");
2325 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0);
2336 if (cs42l42->sdw_peripheral)
2337 cs42l42->sdw_waiting_first_unattach = true;
2339 gpiod_set_value_cansleep(cs42l42->reset_gpio, 1);
2344 if (cs42l42->irq) {
2345 ret = request_threaded_irq(cs42l42->irq,
2348 "cs42l42", cs42l42);
2350 dev_err_probe(cs42l42->dev, ret,
2357 ret = devm_snd_soc_register_component(cs42l42->dev, component_drv, dai, 1);
2364 if (cs42l42->irq)
2365 free_irq(cs42l42->irq, cs42l42);
2368 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0);
2370 regulator_bulk_disable(ARRAY_SIZE(cs42l42->supplies), cs42l42->supplies);
2376 int cs42l42_init(struct cs42l42_private *cs42l42)
2382 devid = cirrus_read_device_id(cs42l42->regmap, CS42L42_DEVID_AB);
2385 dev_err(cs42l42->dev, "Failed to read device ID: %d\n", ret);
2389 if (devid != cs42l42->devid) {
2391 dev_err(cs42l42->dev,
2393 cs42l42->devid & 0xff, devid, cs42l42->devid);
2397 ret = regmap_read(cs42l42->regmap, CS42L42_REVID, ®);
2399 dev_err(cs42l42->dev, "Get Revision ID failed\n");
2403 dev_info(cs42l42->dev,
2405 cs42l42->devid & 0xff, reg & 0xFF);
2408 regmap_update_bits(cs42l42->regmap, CS42L42_PWR_CTL1,
2424 ret = cs42l42_handle_device_data(cs42l42->dev, cs42l42);
2432 if (cs42l42->sdw_peripheral) {
2433 regmap_update_bits(cs42l42->regmap, CS42L42_PWR_CTL2,
2441 cs42l42_setup_hs_type_detect(cs42l42);
2447 cs42l42->init_done = true;
2450 cs42l42_set_interrupt_masks(cs42l42);
2455 regmap_write(cs42l42->regmap, CS42L42_CODEC_INT_MASK, 0xff);
2456 regmap_write(cs42l42->regmap, CS42L42_TSRS_PLUG_INT_MASK, 0xff);
2457 regmap_write(cs42l42->regmap, CS42L42_PWR_CTL1, 0xff);
2460 if (cs42l42->irq)
2461 free_irq(cs42l42->irq, cs42l42);
2463 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0);
2464 regulator_bulk_disable(ARRAY_SIZE(cs42l42->supplies),
2465 cs42l42->supplies);
2470 void cs42l42_common_remove(struct cs42l42_private *cs42l42)
2472 if (cs42l42->irq)
2473 free_irq(cs42l42->irq, cs42l42);
2479 if (cs42l42->init_done) {
2480 regmap_write(cs42l42->regmap, CS42L42_CODEC_INT_MASK, 0xff);
2481 regmap_write(cs42l42->regmap, CS42L42_TSRS_PLUG_INT_MASK, 0xff);
2482 regmap_write(cs42l42->regmap, CS42L42_PWR_CTL1, 0xff);
2485 gpiod_set_value_cansleep(cs42l42->reset_gpio, 0);
2486 regulator_bulk_disable(ARRAY_SIZE(cs42l42->supplies), cs42l42->supplies);